Basic instructions
Transfer
✔
✔
✔
Transfer
✔
✔
✔
Transfer accumulator 1 to status word
✔
✔
✔
Switch AR1 and AR2
✔
✔
✔
Transfer AR1 to accumulator 1
✔
✔
✔
Transfer AR1 to double word
✔
✔
✔
Transfer AR1 to AR2
✔
✔
✔
Transfer AR2to accumulator 1
✔
✔
✔
Transfer AR2 to double word
Legacy
✔
✔
✔
Implement sequencer
✔
✔
Implement sequencer
✔
✔
✔
Discrete control-timer alarm
✔
✔
✔
Motor control-timer alarm
✔
✔
✔
Compare input bits with the bits of a mask
✔
✔
✔
Compare scan matrix
✔
✔
✔
Lead and lag algorithm
✔
✔
✔
Create bit pattern for seven-segment display
✔
✔
✔
Create tens complement
✔
✔
✔
Count number of set bits
A5E33285102-AB
Extended instructions
Description
Technology
STL
LAD / FBD
(not S7-1200)
nn
T STW
CAR
TAR1
TAR1 <D>
TAR1 AR2
TAR2
TAR2 <D>
DRUM
DRUM_X
DCAT
MCAT
IMC
SMC
LEAD_LAG
SEG
BCDCPL
BITSUM
Communication
SCL
T
nn
nn
nn
nn
nn
nn
nn
nn
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