Mitsubishi Electric MELSEC iQ-R Series Reference Manual page 31

Inter-module synchronization function
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■Precautions
This section describes the precautions for coordinating with the multiple CPU system function's fixed scan communication
cycle.
• Even if the input/output settings for other than the group are enabled with another CPU module's program, the input or
output cannot be retrieved from the synchronization target's module. Data can be read with direct specifications such as the
DX, DY, Un\Gn or FROM instructions, but the data might be inconsistent.
• To synchronize the start timings of inter-module synchronization function for all CPU modules and all stations, set the CPU
parameter to synchronize the rising of each module, and set the system parameter to synchronize the rising of all CPU
modules.
• By setting "Fixed Scan Communication Function and Inter-module Synchronization Function" to "Cooperate" in multiple
CPU setting of system parameter, the fixed scan communication cycle of multiple CPU system function operates according
to the inter-module synchronization cycle of the inter-module synchronization function, and the both functions are controlled
to operate at the same timing. (In this case, the fixed scan communication cycle of multiple CPU system function cannot be
set.) Note that the number of program executions is different even though "Cooperate" is set in multiple CPU setting of
system parameter, because the start timings of interrupt program executions are different between the inter-module
synchronous interrupt (I44) and the multiple CPU synchronous interrupt (I45). For details on the start timings, refer to Page
17 Refresh timing according to CPU module's operation status. For details on the operations of interrupt programs (such as
during interrupt disabled time), refer to the MELSEC iQ-R CPU Module User's Manual (Application).
• Control with synchronized timing is not possible without synchronizing with the inter-module synchronization function even
if the same value is set for the multiple CPU system function's fixed scan communication cycle and the inter-module
synchronization cycle.
Motion CPU
The execution timing for the motion operation or motion SFC event task (fixed cycle task) is as follows when the multiple CPU
system function's fixed scan communication cycle or inter-module synchronization cycle is used.
Item
Fixed scan
Disable
communication
cycle for multiple
CPU system
Enable
function
*1 When the motion operation cycle and the multiple CPU system function's fixed scan communication cycle or inter-module
synchronization cycle differ, the start timing of the longer cycle is always synchronized with the start timing of the shorter cycle.
Ex.
When using the following setting with programmable controller CPU (CPU No.1) and Motion CPU (CPU No.2)
• Inter-module synchronization cycle = 1.00ms, multiple CPU system function's fixed scan communication cycle = 0.888ms
• Set the Motion CPU (CPU No.2) to "Do Not Synchronize" in the inter-module synchronization target module selection
The communication cycle of the programmable controller CPU (CPU No.1) and Motion CPU (CPU No.2) multiple CPU
synchronous interrupt program (I45) and CPU buffer memory access device (U3En\HGn) is a 0.888ms cycle.
The programmable controller CPU (CPU No.1) inter-module synchronous interrupt program (I44) has a 1.00ms cycle.
The Motion CPU operation cycle is a cycle synchronized to 0.888ms.
Inter-module synchronization cycle
Disable
Cycle unique to Motion CPU
Do not synchronize
Fixed scan communication cycle for multiple CPU system
*1
with inter-module
function
(Page 30 Timing example 1)
synchronization
cycle
Synchronize with
Setting not possible
inter-module
synchronization
cycle
Enable
Do not synchronize
Synchronize with the
with the selected inter-
selected inter-module
module
synchronization target
synchronization target
module
module
Synchronization with inter-
module synchronization
cycle
Error occurs
Multiple CPU system function's fixed scan communication
cycle = synchronization with inter-module synchronization
*1
cycle
(Page 30 Timing example 2, Page 30 Timing
example 3)
5.1 Fixed Cycle Synchronization Function
5
*1
5 FUNCTION
29

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