Fujitsu M255XK Customer Engineering Manual page 24

5 1/4" mini-flexible disk drive
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tfagnetizatiou of disk
- I
~
1 ...... 1--1
Pre-up
OQtpllt
Pre-up
OQtpllt
Differential amp
OQtp1t
Differential up
OQtpllt
,L..-_ . . . .
Figure 3.04 Typical Read Circuit Waveforms
1--
L
The write circuits include the write power gate, erase driver, data latch, write
driver, and associated circuits.
The write power gate turns on when the Write Gate (interface input signal) is true
and the write protect sensor detects the notch on the side of the diskette (write
enable).
The
tunnel
erase
heads
are
positioned
approximately
0.58mm behind the
Read/Write gap, and'the erase gate signal is activated (to allow for this offset)
from the turn-on time of the Write Gate signal.
Refer to the write circuit timing diagram in Figure 3-5. Writing is enabled by +12
Volts being applied to the center tap of the Read/Write head, when the Write Gate
interface signal is set true and Write Protect is false.
Externally supplied write data pulse strings are latched by the data latch, and the
two write drivers alternately turn on and off to send the proper write current
signals to the Read/Write head.
Read Data output is prevented when the write driver is operating.
3-6
TS-021-013087 ••• 01

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