Table of Contents
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10.3.4
Operation of the S5U1C33001H system ......................................................................... 38
10.3.5
Wiring between the S1C33xxx chip and target connector ............................................... 39
10.3.6
Reset request .................................................................................................................. 39
10.3.7
Notes on target system power supply.............................................................................. 39
10.3.8
Notes on S5U1C33001H power supply ........................................................................... 40
10.3.9
Core Sync Simple Logic Analyzer Function..................................................................... 40
10.4 Implementation of the PC trace function ................................................................................... 41
10.5 Implementation of the bus trace function .................................................................................. 41
11. TROUBLESHOOTING.................................................................................................................... 42
12. SPECIFICATIONS .......................................................................................................................... 43
S1C33 Family In-Circuit Debugger
S5U1C33001H1400 Manual (Rev. 0.20)
EPSON
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