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1.2.
IC801 and IC802 on the Main Board are using the Write Control Gate Array Logic IC YWL7A1329.
Description of this IC is as follows:
V
121
DD
DR13 122
DR12 123
DR11 124
DR10 125
DR9 126
DR8 127
Vss 128
DR7 129
DR6 130
V
131
DD
DR5 132
DR4 133
DR3 134
DR2 135
DR1 136
DR0 137
SIE R 138
SCI R 139
V
140
DD
Vss 141
Vss3 142
Vss2 143
SCI L 144
SIE L 145
DL17 146
DL16 147
DL15 148
DL14 149
DL13 150
DL12 151
V
152
DD
DL11 153
DL10 154
Vss 155
DL9 156
DL8 157
DL7 158
DL6 159
V
160
3
DD
Pin
Name
I/O
1 V
– Power supply terminal.
DD
2 DL5
O
3 DL4
O
4 DL3
O
RADL Data output terminals. (18-Bit)
5 DL2
O
6 DL1
O
7 DL0
O
8 Vss
– Ground terminal.
9 RASIREL
O RASIREL signal output terminal.
10 IRSCASL
O IRSCASL signal output terminal.
11 V
– Power supply terminal.
DD
12 IRL7
O
13 IRL6
O
14 IRL5
O
AIRL Data output terminals. (8-Bit)
15 IRL4
O
16 IRL3
O
17 IRL2
O
Description
(TOP VIEW)
Pin
Name
18 IRL1
19 IRL0
20 Vss
21 Vss
22 TEST0
23 TEST1
24 TEST2
25 TEST3
26 TEST4
27 PCLEARL
28 UMIN
29 UMOUT
30 NP
31 ID SYNC
32 SEPA ID
14
80 V
DD
79 PB0
78 PB1
77 PB2
76 PB3
75 PB4
74 PB5
73 PB6
72 PB7
71 RWCSYNC
70 Vss
69 RWC14M
68 TEST7
67 WVDR
66 CSR
65 YSR
64 Vss
63 RDCLK
62 TEST6
61 V
DD
60 Vss
59 Vss2
58 PA0
57 PA1
56 PA2
55 PA3
54 PA4
53 PA5
52 PA6
51 PA7
50 LWCSYNC
49 Vss
48 LWC14M
47 TESTOUT
46 WVDL
45 CSL
44 YSL
43 WRTHDL
42 PLLCKL
41 V
DD
I/O
Description
O
AIRL Data output terminals. (8-Bit)
O
– Ground terminal.
– Ground terminal.
I
I
I Test signal input terminals.
I
I
I PCLEARL signal input terminal.
I UM signal input terminal.
O UM signal output terminal.
I NTSC/PAL Selecting signal input
terminal.
H = NTSC
L = PAL
I ID SYNC signal input terminal.
I SEPA ID signal input terminal.
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