NEC Renesas mPD71312 User Manual
NEC Renesas mPD71312 User Manual

NEC Renesas mPD71312 User Manual

Lcd controller/driver dedicated to 78k0/kx2 and 78k0r/kx3
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On April 1
, 2010, NEC Electronics Corporation merged with Renesas Technology
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Summary of Contents for NEC Renesas mPD71312

  • Page 1 Old Company Name in Catalogs and Other Documents On April 1 , 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the old company name remains in this document, it is a valid Renesas Electronics document.
  • Page 2 Notice All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm the latest product information with a Renesas Electronics sales office. Also, please pay regular and careful attention to additional and different information to be disclosed by Renesas Electronics such as that disclosed through our website.
  • Page 3 User’s Manual µ PD71312 LCD Controller/Driver Dedicated to 78K0/Kx2 and 78K0R/Kx3 µ PD71312 Document No. U18438EJ2V0UD00 (2nd edition) Date Published May 2008 NS 2008 Printed in Japan...
  • Page 4 [MEMO] User’s Manual U18438EJ2V0UD...
  • Page 5 NOTES FOR CMOS DEVICES VOLTAGE APPLICATION WAVEFORM AT INPUT PIN Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the CMOS device stays in the area between V (MAX) and V (MIN) due to noise, etc., the device may malfunction.
  • Page 6 NEC Electronics does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of NEC Electronics products listed in this document or any other liability arising from the use of such products. No license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Electronics or others.
  • Page 7 [MEMO] User’s Manual U18438EJ2V0UD...
  • Page 8 INTRODUCTION Readers This manual is intended for user engineers who wish to understand the functions of the µ PD71312 and design and develop application systems and programs for these devices. Purpose This manual is intended to give users an understanding of the functions described in the Organization below.
  • Page 9: Table Of Contents

    CONTENTS CHAPTER 1 OUTLINE ..........................9 1.1 Features ............................9 1.2 Applications.............................9 1.3 Ordering Information ........................9 1.4 Pin Configuration (Top View)...................... 10 CHAPTER 2 PIN FUNCTIONS ....................... 12 2.1 Pin Function List .......................... 12 2.2 Description of Pin Functions ...................... 13 2.2.1 SDA ..............................13 2.2.2 SCL..............................13 2.2.3 S0 to S35, S36 to S39 ........................13 2.2.4 COM0 to COM3 ..........................13...
  • Page 10 4.2 Explanation of Operation......................51 4.2.1 I C bus function ..........................51 4.2.2 Status transition diagram ........................ 53 4.3 Write Operation..........................54 4.4 Read Operation..........................57 CHAPTER 5 ELECTRICAL SPECIFICATIONS ..................61 CHAPTER 6 PACKAGE DRAWINGS ....................66 CHAPTER 7 RECOMMENDED SOLDERING CONDITIONS............... 68 User’s Manual U18438EJ2V0UD...
  • Page 11: Chapter 1 Outline

    CHAPTER 1 OUTLINE 1.1 Features Operating frequency: 400 kHz (MAX.) LCD driver Resistance division method/Internal voltage boosting method Common signals: 4 (dynamic display) Segment signals: 36 (52-pin product), 40 (64-pin product) Note Communication mode: I C (400 kbps (MAX.)) Power supply voltage: LV = 1.8 to 5.5 V = −40 to +85°C Operating ambient temperature: T...
  • Page 12: Pin Configuration (Top View)

    CHAPTER 1 OUTLINE 1.4 Pin Configuration (Top View) • 52-pin plastic LQFP (10 × 10) 52 51 50 49 48 47 46 45 44 43 42 41 40 COM0 COM1 COM2 COM3 14 15 16 17 18 19 20 21 22 23 24 25 26 User’s Manual U18438EJ2V0UD...
  • Page 13 CHAPTER 1 OUTLINE • 64-pin plastic LQFP (10 × 10) 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 Note Note COM0 COM1 COM2 COM3 Note Note 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 Note Leave open or connect to an identical pin that is adjacent to this pin.
  • Page 14: Chapter 2 Pin Functions

    CHAPTER 2 PIN FUNCTIONS 2.1 Pin Function List Table 2-1. Pin Function List Pin Name Function After Reset Serial data I/O for serial interface Input Input Clock input for serial interface Input S0 to S35, Output LCD controller/driver segment signal outputs Output Note S36 to S39...
  • Page 15: Description Of Pin Functions

    CHAPTER 2 PIN FUNCTIONS 2.2 Description of Pin Functions 2.2.1 SDA This is a serial data I/O pin for serial interface (N-ch open-drain). 2.2.2 SCL This is a serial clock input pin for serial interface (N-ch open-drain). Note 2.2.3 S0 to S35, S36 to S39 These pins are the segment signal output pins for the LCD controller/driver.
  • Page 16: Pin I/O Circuits And Recommended Connection Of Unused Pins

    CHAPTER 2 PIN FUNCTIONS 2.3 Pin I/O Circuits and Recommended Connection of Unused Pins Table 2-2 shows the types of pin I/O circuits and the recommended connections of unused pins. See Figure 2-1 for the configuration of the I/O circuit of each type. Table 2-2.
  • Page 17 CHAPTER 2 PIN FUNCTIONS Figure 2-1. Pin I/O Circuit List Type 2 Type 2-G Schmitt-triggered input with hysteresis characteristics Schmitt-triggered input with hysteresis characteristics Type 2-U Type 13-R data IN/OUT output N-ch Note disable Schmitt-triggered input with hysteresis characteristics Type 17 Type 18 P-ch P-ch...
  • Page 18: Chapter 3 Lcd Controller/Driver

    CHAPTER 3 LCD CONTROLLER/DRIVER 3.1 Functions of LCD Controller/Driver µ The functions of the LCD controller/driver in the PD71312 are as follows. The LCD driver reference voltage generator can switch internal voltage boosting, external resistance division, and internal resistance division. Automatic output of segment and common signals based on automatic display data memory read Five different display modes: •...
  • Page 19 CHAPTER 3 LCD CONTROLLER/DRIVER Table 3-1 lists the maximum number of pixels that can be displayed in each display mode. Table 3-1. Maximum Number of Pixels (a) 52-pin product LCD Driver Reference Bias Number of Common Signals Used Number of Maximum Number of Voltage Generator Mode...
  • Page 20: Configuration Of Lcd Controller/Driver

    CHAPTER 3 LCD CONTROLLER/DRIVER 3.2 Configuration of LCD Controller/Driver The LCD controller/driver consists of the following hardware. The LCD controller/driver includes of two blocks: LCDSEG block for controlling segments, and LCDCTL block for controlling LCD register setting and mode setting. Table 3-2.
  • Page 21 Figure 3-2. Block Diagram of LCD Controller/Driver Internal bus LCD mode setting LCD clock control LCD display mode LCD voltage boost control Display data memory Display data memory register (LCDMD) register (LCDC) register (LCDM) register 0 (VLCG0) LCDSEG's 00H LCDSEG's 23H LCDSEG's 24H LCDSEG's 27H LCDM2...
  • Page 22: Controlling Lcd Controller/Driver

    CHAPTER 3 LCD CONTROLLER/DRIVER 3.3 Controlling LCD Controller/Driver LCDCTL (control registers) and LCDSEG (display RAM) have the individual slave ID, and control registers and display RAM have unique addresses. The target control registers and display RAM are accessed by I C with these slave ID and addresses.
  • Page 23 CHAPTER 3 LCD CONTROLLER/DRIVER Figure 3-3 shows the control register of LCD controller/driver and the memory map of display RAM, and Figure 3-4 shows the LCD display RAM. Figure 3-3. Control Register of LCD Controller/Driver Address Register LCDCTL's 03H VLCG0 CTSEL1 CTSEL0 GAIN...
  • Page 24: Registers Controlling Lcd Controller/Driver

    CHAPTER 3 LCD CONTROLLER/DRIVER 3.4 Registers Controlling LCD Controller/Driver The following four registers are used to control the LCD controller/driver. • LCD mode setting register (LCDMD) • LCD display mode register (LCDM) • LCD clock control register (LCDC) • LCD voltage boost control register 0 (VLCG0) LCD mode setting register (LCDMD) LCDMD sets the number of segments and the LCD reference voltage generator.
  • Page 25 CHAPTER 3 LCD CONTROLLER/DRIVER LCD display mode register (LCDM) LCDM specifies whether to enable display operation. It also specifies whether to enable segment pin/common pin output, booster circuit operation, and the display mode. LCDM is set using an 8-bit memory manipulation instruction. Reset signal generation sets LCDM to 00H.
  • Page 26 CHAPTER 3 LCD CONTROLLER/DRIVER Cautions 1. Bits 3 and 4 must be set to 0. 2. When operating VLCON, follow the procedure described below. A. To stop voltage boosting after switching display status from on to off: 1) Set to display off status by setting LCDON = 0. 2) Disable outputs of all the segment buffers and common buffers by setting SCOC = 0.
  • Page 27 CHAPTER 3 LCD CONTROLLER/DRIVER LCD voltage boost control register 0 (VLCG0) VLCG0 controls the voltage boost level during the voltage boost operation. VLCG0 is set with an 8-bit memory manipulation instruction. Reset signal generation sets VLCG0 to 00H. Figure 3-8. Format of LCD Voltage Boost Control Register 0 After reset: Address: LCDCTL's 03H Symbol...
  • Page 28: Setting Lcd Controller/Driver

    CHAPTER 3 LCD CONTROLLER/DRIVER 3.5 Setting LCD Controller/Driver Set the LCD controller/driver using the following procedure. Remark For details of communications by I C, see CHAPTER 4 I C COMMUNICATIONS. (1) Voltage boosting method • Operation flow for transition of reset status to display status in LCD controller/driver Note <1>...
  • Page 29 CHAPTER 3 LCD CONTROLLER/DRIVER (2) Resistance division method • Operation flow for transition of reset status to display status in LCD controller/driver Note <1> Release the reset status (RESET = High level). <2> Supply the clock (Input the clock to LCLK). <3>...
  • Page 30: Lcd Display Data Memory

    CHAPTER 3 LCD CONTROLLER/DRIVER 3.6 LCD Display Data Memory The LCD display data memory is mapped at addresses 00H to 23H of LCDSEG for 52-pin product and addresses 00H to 27H of LCDSEG for 64-pin product. Data in the LCD display data memory can be displayed on the LCD panel using the LCD controller/driver.
  • Page 31: Common And Segment Signals

    CHAPTER 3 LCD CONTROLLER/DRIVER 3.7 Common and Segment Signals Each pixel of the LCD panel turns on when the potential difference between the corresponding common and segment signals becomes higher than a specific voltage (LCD drive voltage, V ). The pixels turn off when the potential difference becomes lower than V Applying DC voltage to the common and segment signals of an LCD panel causes deterioration.
  • Page 32 CHAPTER 3 LCD CONTROLLER/DRIVER Output waveforms of common and segment signals The voltages listed in Table 3-5 are output as common and segment signals. When both common and segment signals are at the select voltage, a display on-voltage of ±V is obtained.
  • Page 33 CHAPTER 3 LCD CONTROLLER/DRIVER Figure 3-10 shows the common signal waveforms, and Figure 3-11 shows the voltages and phases of the common and segment signals. Figure 3-10. Common Signal Waveforms (a) Static display mode COMn (Static display) T: One LCD clock period : Frame frequency (b) 1/2 bias method COMn...
  • Page 34 CHAPTER 3 LCD CONTROLLER/DRIVER Figure 3-11. Voltages and Phases of Common and Segment Signals (a) Static display mode Select Deselect Common signal Segment signal T: One LCD clock period (b) 1/2 bias method Select Deselect Common signal Segment signal T: One LCD clock period (c) 1/3 bias method Select Deselect...
  • Page 35: Display Modes

    CHAPTER 3 LCD CONTROLLER/DRIVER 3.8 Display Modes 3.8.1 Static display example Figure 3-13 shows how the three-digit LCD panel having the display pattern shown in Figure 3-12 is connected to the segment signals (S0 to S23) and the common signal (COM0). This example displays data "12.3" in the LCD panel. The contents of the display data memory (addresses 00H to 17H of LCDSEG) correspond to this display.
  • Page 36 CHAPTER 3 LCD CONTROLLER/DRIVER Figure 3-13. Example of Connecting Static LCD Panel COM 3 COM 2 Can be connected together COM 1 COM 0 LCDSEG's 00H S 10 S 11 S 12 S 13 S 14 S 15 S 16 LCDSEG's 10H S 17 S 18...
  • Page 37 CHAPTER 3 LCD CONTROLLER/DRIVER Figure 3-14. Static LCD Drive Waveform Examples COM0 COM0 to S11 COM0 to S12 User’s Manual U18438EJ2V0UD...
  • Page 38: Two-Time-Slice Display Example

    CHAPTER 3 LCD CONTROLLER/DRIVER 3.8.2 Two-time-slice display example Figure 3-16 shows how the 6-digit LCD panel having the display pattern shown in Figure 3-15 is connected to the segment signals (S0 to S23) and the common signals (COM0 and COM1). This example displays data "12345.6" in the LCD panel.
  • Page 39 CHAPTER 3 LCD CONTROLLER/DRIVER Figure 3-16. Example of Connecting Two-Time-Slice LCD Panel COM 3 Open COM 2 Open COM 1 COM 0 LCDSEG's 00H S 10 S 11 S 12 S 13 S 14 S 15 S 16 LCDSEG's 10H S 17 S 18 S 19...
  • Page 40 CHAPTER 3 LCD CONTROLLER/DRIVER Figure 3-17. Two-Time-Slice LCD Drive Waveform Examples (1/2 Bias Method) COM0 LC1,2 COM1 LC1,2 LC1,2 +1/2V COM0 to S15 1/2V +1/2V COM1 to S15 1/2V User’s Manual U18438EJ2V0UD...
  • Page 41: Three-Time-Slice Display Example

    CHAPTER 3 LCD CONTROLLER/DRIVER 3.8.3 Three-time-slice display example Figure 3-19 shows how the 8-digit LCD panel having the display pattern shown in Figure 3-18 is connected to the segment signals (S0 to S23) and the common signals (COM0 to COM2). This example displays data "123456.78" in the LCD panel.
  • Page 42 CHAPTER 3 LCD CONTROLLER/DRIVER Figure 3-19. Example of Connecting Three-Time-Slice LCD Panel COM 3 Open COM 2 COM 1 COM 0 LCDSEG's 00H S 10 S 11 S 12 S 13 S 14 S 15 S 16 LCDSEG's 10H S 17 S 18 S 19 S 20...
  • Page 43 CHAPTER 3 LCD CONTROLLER/DRIVER Figure 3-20. Three-Time-Slice LCD Drive Waveform Examples (1/2 Bias Method) COM0 LC1,2 COM1 LC1,2 COM2 LC1,2 LC1,2 +1/2V COM0 to S6 1/2V +1/2V COM1 to S6 1/2V +1/2V COM2 to S6 1/2V User’s Manual U18438EJ2V0UD...
  • Page 44 CHAPTER 3 LCD CONTROLLER/DRIVER Figure 3-21. Three-Time-Slice LCD Drive Waveform Examples (1/3 Bias Method) COM0 COM1 COM2 +1/3V COM0 to S6 1/3V +1/3V COM1 to S6 1/3V +1/3V COM2 to S6 1/3V User’s Manual U18438EJ2V0UD...
  • Page 45: Four-Time-Slice Display Example

    CHAPTER 3 LCD CONTROLLER/DRIVER 3.8.4 Four-time-slice display example Figure 3-23 shows how the 12-digit LCD panel having the display pattern shown in Figure 3-22 is connected to the segment signals (S0 to S23) and the common signals (COM0 to COM3). This example displays data "123456.789012"...
  • Page 46 CHAPTER 3 LCD CONTROLLER/DRIVER Figure 3-23. Example of Connecting Four-Time-Slice LCD Panel COM 3 COM 2 COM 1 COM 0 LCDSEG's 00H S 10 S 11 S 12 S 13 S 14 S 15 S 16 LCDSEG's 10H S 17 S 18 S 19 S 20...
  • Page 47 CHAPTER 3 LCD CONTROLLER/DRIVER Figure 3-24. Four-Time-Slice LCD Drive Waveform Examples (1/3 Bias Method) COM0 COM1 COM2 COM3 +1/3V COM0 to S12 1/3V +1/3V COM1 to S12 1/3V Remark The waveforms for COM2 to S12 and COM3 to S12 are omitted. User’s Manual U18438EJ2V0UD...
  • Page 48: Supplying Lcd Drive Voltages

    CHAPTER 3 LCD CONTROLLER/DRIVER 3.9 Supplying LCD Drive Voltages V , and V A LCD drive power supply can be generated using either of three types of methods: internal resistance division method, external resistance division method, or internal voltage boosting method. 3.9.1 Internal resistance division method Voltage divider resistors for generating LCD drive power supplies are incorporated.
  • Page 49 CHAPTER 3 LCD CONTROLLER/DRIVER Figure 3-25. Examples of LCD Drive Power Connections (Internal Resistance Division Method) (a) 1/3 bias method and static display mode (b) 1/2 bias method Remark It is recommended to use the external resistance division method when using the static display mode, in order to reduce power consumed by the voltage divider resistor.
  • Page 50: External Resistance Division Method

    CHAPTER 3 LCD CONTROLLER/DRIVER 3.9.2 External resistance division method It is also possible to use external voltage divider resistors for generating LCD drive power supplies, without using internal resistors. Figure 3-26 shows examples of LCD drive voltage connection, corresponding to each bias method. Figure 3-26.
  • Page 51: Internal Voltage Boosting Method

    CHAPTER 3 LCD CONTROLLER/DRIVER 3.9.3 Internal voltage boosting method A booster circuit (×3 only) to generate a supply voltage to drive the LCD is contained. The internal LCD reference voltage is output from the V pin. A voltage two times higher than that on V is output from the V pin and a voltage three times higher than that on V...
  • Page 52: Chapter 4 I C Communications

    CHAPTER 4 I C COMMUNICATIONS µ Setting of LCD controller/driver in the PD71312 is performed by communication of the I C bus interface. The outline of communication is as follows. • Communication pins: SCL, SDA • Communication function: Slave transmission/reception 4.1 System Configuration The system configuration of the LCD controller/driver is illustrated in Figure 4-1.
  • Page 53: Explanation Of Operation

    CHAPTER 4 I C COMMUNICATIONS 4.2 Explanation of Operation 4.2.1 I C bus function Start conditions A start condition is met when the SCL pin is at high level (a serial clock has not been output) and the SDA pin changes from high level to low level.
  • Page 54 CHAPTER 4 I C COMMUNICATIONS Transfer direction specification In addition to the 7-bit address data, the master device sends 1 bit that specifies the transfer direction. Since this I C bus only has a slave function, this bit is monitored to determine the transfer direction. When this transfer direction specification bit has a value of “0”, it indicates that the master device is transmitting data to a slave device.
  • Page 55: Status Transition Diagram

    CHAPTER 4 I C COMMUNICATIONS Stop condition When the SCL pin is at high level (when serial transfer has been completed and a serial clock has not been output), changing the SDA pin from low level to high level generates a stop condition. A stop condition is a signal that the master device outputs to the slave device when serial transfer has been completed.
  • Page 56: Write Operation

    CHAPTER 4 I C COMMUNICATIONS 4.3 Write Operation The processing procedure, format, and operation of writing to the LCD controller/driver via the I C bus interface are explained below. The LCD controller/driver register to be accessed can be specified with the slave ID and address (see Figure 3-3). (1) Processing procedure Figure 4-8.
  • Page 57 CHAPTER 4 I C COMMUNICATIONS (2) Communication format Write data to each register on the LCD controller/driver starting from the start condition, slave ID, address, write data, then stop condition in that order. Figure 4-9. Communication Format for Write Operation (When Writing Twice) Access <1>...
  • Page 58 CHAPTER 4 I C COMMUNICATIONS (3) Operation The operation flow when transmitting write data twice is shown below. Steps <1> to <11> correspond to <1> to <11> in Figure 4-9. <1> The start condition is transmitted. <2> The slave ID is transmitted (from the 1st to 7th clocks). <3>...
  • Page 59: Read Operation

    CHAPTER 4 I C COMMUNICATIONS 4.4 Read Operation The processing procedure, format, and operation of reading the LCD controller/driver via the I C bus interface are explained below. The LCD controller/driver register to be accessed can be specified with the slave ID and address (see Figure 3-3). (1) Processing procedure Figure 4-11.
  • Page 60 CHAPTER 4 I C COMMUNICATIONS (2) Communication format Read data from each register on the LCD controller/driver starting from the start condition, slave ID, address, restart condition, slave ID, read data, then stop condition in that order. Figure 4-12. Communication Format for Read Operation (When Reading Twice) Access <1>...
  • Page 61 CHAPTER 4 I C COMMUNICATIONS (3) Operation The operation flow when receiving read data twice is shown below. Steps <1> to <15> correspond to <1> to <15> in Figure 4-12. <1> The start condition is transmitted. <2> The slave ID is transmitted (first time) (from the 1st to 7th clocks). <3>...
  • Page 62 CHAPTER 4 I C COMMUNICATIONS Figures 4-13 shows the timing chart of the read operation. Figure 4-13. Timing Chart of Read Operation Start condition Master Setup Setup SCL0 SDA0 IIC shift register 0 Write to IIC shift register 0 IIC bus Start condition Slave IIC shift...
  • Page 63: Chapter 5 Electrical Specifications

    CHAPTER 5 ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings (T = 25°C) Parameter Symbol Conditions Ratings Unit −0.3 to +6.5 Supply voltage −0.3 to +0.3 −0.3 to LV Note 1 Input voltage RESET, LCLK, SCL, SDA + 0.3 −0.3 to LV Note 1 Output voltage + 0.3 −0.3 to V...
  • Page 64 CHAPTER 5 ELECTRICAL SPECIFICATIONS DC Characteristics = −40 to +85°C, 1.8 V ≤ LV ≤ 5.5 V, LV = 0 V) Parameter Symbol Conditions MIN. TYP. MAX. Unit 4.0 V ≤ LV ≤ 5.5 V Output current, low 2.7 V ≤ LV <...
  • Page 65 CHAPTER 5 ELECTRICAL SPECIFICATIONS AC Characteristics (1) Basic operation = −40 to +85°C, 1.8 V ≤ LV ≤ 5.5 V, LV = 0 V) Parameter Symbol Conditions MIN. TYP. MAX. Unit Maximum operating frequency LCLK µ RESET low-level width (2) Serial interface (IIC) = −40 to +85°C, 1.8 V ≤...
  • Page 66 CHAPTER 5 ELECTRICAL SPECIFICATIONS = −40 to +85°C) LCD Characteristics (T (1) Resistance division method (a) Static display mode (2.0 V ≤ LV ≤ 5.5 V) Parameter Symbol Conditions MIN. TYP. MAX. Unit LCD drive voltage Note 1 LCD divider resistor kΩ...
  • Page 67 CHAPTER 5 ELECTRICAL SPECIFICATIONS (2) Internal voltage boosting method (1.8 V ≤ LV ≤ 5.5 V) Parameter Symbol Conditions MIN. TYP. MAX. Unit Note 1 LCD output voltage variation range V C1 to C4 GAIN = 0 CTSEL1 = 0, 1.35 1.43 1.51...
  • Page 68: Chapter 6 Package Drawings

    CHAPTER 6 PACKAGE DRAWINGS 52-PIN PLASTIC LQFP(10x10) detail of lead end θ (UNIT:mm) ITEM DIMENSIONS 10.00±0.20 10.00±0.20 12.00±0.20 12.00±0.20 1.60 MAX. 0.10±0.05 1.40±0.05 0.25 0.32 +0.08 −0.07 0.145 +0.055 −0.045 0.50 0.60±0.15 1.00±0.20 3° +5° θ −3° 0.65 NOTE 0.13 Each lead centerline is located within 0.13 mm of 0.10 its true position at maximum material condition.
  • Page 69 CHAPTER 6 PACKAGE DRAWINGS 64-PIN PLASTIC LQFP(FINE PITCH)(10x10) detail of lead end θ (UNIT:mm) ITEM DIMENSIONS 10.00±0.20 10.00±0.20 12.00±0.20 12.00±0.20 1.60 MAX. 0.10±0.05 1.40±0.05 0.25 0.22±0.05 0.145 +0.055 −0.045 0.50 0.60±0.15 1.00±0.20 3° +5° θ −3° 0.50 0.08 0.08 NOTE 1.25 Each lead centerline is located within 0.08 mm of 1.25...
  • Page 70: Chapter 7 Recommended Soldering Conditions

    CHAPTER 7 RECOMMENDED SOLDERING CONDITIONS These products should be soldered and mounted under the following recommended conditions. For soldering methods and conditions other than those recommended below, please contact an NEC Electronics sales representative. For technical information, see the following website.
  • Page 71 Kawasaki, Kanagawa 211-8668, Japan Tel: 044-435-5111 http://www.necel.com/ [Asia & Oceania] [America] [Europe] NEC Electronics (China) Co., Ltd NEC Electronics America, Inc. NEC Electronics (Europe) GmbH 7th Floor, Quantum Plaza, No. 27 ZhiChunLu Haidian 2880 Scott Blvd. Arcadiastrasse 10 District, Beijing 100083, P.R.China Santa Clara, CA 95050-2554, U.S.A.

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