NEC Renesas mPD720210 Hardware User Manual
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NEC Renesas mPD720210 Hardware User Manual

NEC Renesas mPD720210 Hardware User Manual

Assp four-port usb 3.0 hub controller
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μ
PD720210
ASSP (Four-port USB 3.0 Hub Controller)
All information contained in these materials, including products and product specifications,
represents information on the product at the time of publication and is subject to change by
Renesas Electronics Corp. without notice. Please review the latest information published by
Renesas Electronics Corp. through various means, including the Renesas Electronics Corp.
website (http://www.renesas.com).
www.renesas.com
User's Manual: Hardware
Rev.2.00 May 2014

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Summary of Contents for NEC Renesas mPD720210

  • Page 1 μ PD720210 User’s Manual: Hardware ASSP (Four-port USB 3.0 Hub Controller) All information contained in these materials, including products and product specifications, represents information on the product at the time of publication and is subject to change by Renesas Electronics Corp. without notice. Please review the latest information published by Renesas Electronics Corp.
  • Page 2 Notice Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for the incorporation of these circuits, software, and information in the design of your equipment. Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits, software, or information.
  • Page 3 NOTES FOR CMOS DEVICES (1) VOLTAGE APPLICATION WAVEFORM AT INPUT PIN: Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the CMOS device stays in the area between VIL (MAX) and VIH (MIN) due to noise, etc., the device may malfunction.
  • Page 4 Windows is either a registered trademark or a trademark of Microsoft Corporation in the United States and/or other countries.
  • Page 5 PREFACE Readers This manual is intended for engineers who need to be familiar with the capability μ of the PD720210 in order to develop application systems based on it. Purpose The purpose of this manual is to help users understand the hardware capabilities μ...

  • Page 6: Table Of Contents

    CONTENTS 1. Overview .............................. 1 1.1 Features ............................ 1 1.2 Applications ..........................2 1.3 Ordering Information ......................2 1.4 Block Diagram ......................... 3 1.5 Pin Configuration ........................5 2. Pin Function ............................6 2.1 Power Supply ........................... 6 2.2 Analog Interface ........................7 2.3 System Clock ...........................
  • Page 7 4.3.4 Configuration Descriptor ......................30 4.3.5 Interface Descriptor (combined with Configuration Descriptor) ..........30 4.3.6 Endpoint Descriptor (combined with Configuration Descriptor) ..........30 4.3.7 Other Speed Configuration Descriptor .................. 31 4.3.8 Interface Descriptor (combined with Other Speed Configuration Descriptor) ......31 4.3.9 Endpoint Descriptor (combined with Other Speed Configuration Descriptor) ......
  • Page 8 LIST OF FIGURES Figure No. Title Page 1-1 μPD720210 Block Diagram ..........................3 μ 1-2 Pin Configuration of PD720210 (Top View) ....................5 6-1 VBUS Control Configuration with Battery Charging Function ................ 41 6-2 Downstream Port VBUS Control ........................41 6-3 Remote Wake Up Function ...........................
  • Page 9 LIST OF TABLES (1/2) Table No. Title Page 1-1 Terminology ..............................4 3-1 External SPI ROM Information ........................13 4-1 Device Descriptor ............................16 4-2 BOS Descriptor ............................. 17 4-3 USB 2.0 Extension ............................17 4-4 SuperSpeed Device Capabilities ........................18 4-5 Container ID ..............................
  • Page 10 LIST OF TABLES (2/2) Table No. Title Page 5-9 Address Length of External ROM ........................36 5-10 PPON1B Output Function ........................... 37 6-1 Battery Charging Mode ..........................39 6-2 Battery Charging Mode ..........................40 6-3 Clock Output Function Settings ........................44 6-4 Clock Output Stop Condition .........................

  • Page 11: Overview

    User’s Manual μ PD720210 R19UH0093EJ0200 ASSP (Four-port USB 3.0 Hub Controller) Rev.2.00 May 26, 2014 1. Overview μ PD720210 is a USB 3.0 hub controller that complies with the Universal Serial Bus (USB) Specification Revision 3.0 and operates at up to 5 Gbps. The device incorporates Renesas’...

  • Page 12: Applications

    μ PD720210 1. Overview Applications Standalone Hub, Monitor-Hub, Docking Station, Integrated Hub, etc. Ordering Information Operating Temperature Part Number Package Remark μ 76-pin QFN (9 × 9) 0 to +70°C PD720210K8-BAF-A Lead-free product R19UH0093EJ0200 Rev.2.00 Page 2 of 59 May 26, 2014...

  • Page 13: Block Diagram

    μ PD720210 1. Overview Block Diagram Figure 1-1. μPD720210 Block Diagram 1.05v SW Regulator Control (V50IN -> VDD10) VBUS Switch HS/FS/LS PHY HS/FS/LS HS/FS/LS HS/FS/LS Connector (V50IN -> VDD33) SS-PHY 3.3v US Port DS Port Hub Core Control Control VBUS Switch HS/FS/LS PHY Connector...
  • Page 14 μ PD720210 1. Overview Table 1-1. Terminology Block Name Description SS PHY SuperSpeed transceiver HS/FS/LS PHY High-/Full-/Low-speed transceiver VBUS Monitor Monitors the VBUS voltage level of the upstream port. SS US Port Upstream port control logic for SuperSpeed Control HS/FS/LS US Upstream port control logic for High-/Full-/Low-speed Port Control SS Hub Core...

  • Page 15: Pin Configuration

    μ PD720210 1. Overview Pin Configuration • 76-pin QFN (9 × 9) μ PD720210K8-BAF-A μ Figure 1-2. Pin Configuration of PD720210 (Top View) SUSPEND/NRDCLKO OCI3B RESETB PPON2B U3TXDP1 OCI2B U3TXDN1 V10FB VDD10 ILIM U3RXDP1 NGDRV U3RXDN1 PGDRV VDD33 AVDD33R U2DP1 V50IN U2DM1 V33OUT...

  • Page 16: Pin Function

    μ PD720210 2. Pin Function 2. Pin Function This section describes each pin function. Strapping information in the tables shows how the pin can be used to configure the functional settings of this controller when the pin is pulled up/down, as detected at the end of chip reset. Refer to Chapter 5 for a complete description of all available pin strap settings.

  • Page 17: Analog Interface

    μ PD720210 2. Pin Function Analog Interface Pin Name Pin No. Function Type Reference Voltage Input for USB 2.0 RREF must be connected to a 1.6 kΩ resistor with a tolerance of +/- 1%. RREF It is strongly recommended to use a single resistor for 1.6 kΩ, versus the combined resistance with multiple resistors to achieve this value and tolerance.

  • Page 18: System Interface Pins

    μ PD720210 2. Pin Function System Interface Pins Active Pin Name Function Type Level SUSPEND Output or CLKOUT depending on pin strap setting of SPICSB and OCI1B. SUSPEND is Suspend state output 1: in suspend state 0: not in suspend state [Note] SUSPEND/NRDCLKO output level is Hi-z till this pin function is SUSPEND/NRDCLKO...

  • Page 19: Usb Port Control Pins

    μ PD720210 2. Pin Function USB Port Control Pins Active Pin Name Pin No. Function Type Level [Function] Over Current Input 0: Over-current condition is detected. 1: Non over-current condition is detected. [Pin strapping option] OCI1B OCI1B Pin Function Removable device setting High and Over current input.

  • Page 20: Usb Data Pins

    μ PD720210 2. Pin Function Active Pin Name Pin No. Function Type Level [Function] These pins are a Port Power Control signal. 0: Power supply for VBUS is on. 1: Power supply for VBUS is off. [Pin strapping option] These pins are used for pin strapping options to select Number of ports.

  • Page 21: Spi Interface

    μ PD720210 2. Pin Function SPI Interface Active Pin Name Pin No. Function Type Level [Function] External serial ROM Clock Output or LED output, depending on pin strap setting. [Pin strapping option] SPISCK/LED4B This pin is used for pin strapping option to select the below functions.

  • Page 22: External Rom Settings

    μ PD720210 3. External ROM Settings 3. External ROM Settings Overview μ PD720210 can connect the external SPI ROM by option. Using the external SPI ROM has the following advantages. PID/VID can be set as needed by the μPD720210 ROM Writing Tool for Windows (W210ROMTOOL.exe).

  • Page 23: Rom Contents

    μ PD720210 3. External ROM Settings Table 3-1. External SPI ROM Information Vendor Product Name SPI EEPROM RENESAS R1EX25064ASA00A RENESAS R1EX25064ATA00A SPI Serial Flash ROM Macronix MX25L512E Winbond W25X05CL Numonyx M25P05-P Chingis Pm25LD512C2 Adesto Technologies AT25DF512C, AT25F512B EN25F05 AMIC A25L512 ROM Contents μ...

  • Page 24: Configurable Items

    μ PD720210 3. External ROM Settings Configurable Items μ The following configurable Items can be set by the PD720210 ROM Writing Tool for Windows μ (W210ROMTOOL.exe). Default value is the initial value of PD720210. Category Item Name Description Default Value <USB 3.0>...

  • Page 25: Low Power Mode During Suspend

    μ PD720210 3. External ROM Settings Low Power Mode during Suspend μ This mode can be reduce the power consumption of PD720210 during Suspend (U3 State) where the μ PD720210 is disabled from signaling a remote wakeup due to a connect or disconnect event. By enabling this mode, the power consumption during Sleep state decreases in the Windows8 and Windows8.1 environments.

  • Page 26: Usb Descriptor Information

    μ PD720210 4. USB Descriptor Information 4. USB Descriptor Information SuperSpeed Descriptors 4.1.1 Device Descriptor Table 4-1. Device Descriptor Field Name Size(Byte) Value Description bLength Size of Descriptor (18 bytes) bDescriptorType Descriptor type (DEVICE) bcdUSB 0300h USB Specification Release Number (3.00) bDeviceClass Class Code (HUB CLASS) bDeviceSubClass...

  • Page 27: Bos Descriptor

    μ PD720210 4. USB Descriptor Information 4.1.2 BOS Descriptor Table 4-2. BOS Descriptor Field Name Size(Byte) Value Description bLength Size of Descriptor (5 bytes) bDescriptorType Descriptor type (BOS) wTotalLength 002Ah Total descriptor length (42 bytes) bNumDeviceCaps Number of device capability descriptor (3) Table 4-3.
  • Page 28 μ PD720210 4. USB Descriptor Information Table 4-4. SuperSpeed Device Capabilities Field Name Size(Byte) Value Description bLength Size of Descriptor (10 bytes) bDescriptorType Descriptor type (DEVICE CAPABILITY) bDeviceCapabiltiyType Device Capability Type (SUPERSPEED_USB) bmAttributes Supported device capability (LTM = 0) wSpeedsSupported 000Eh Speeds Supported (FS = 1, HS = 1, SS = 1) bFunctionalitySupport...

  • Page 29: Configuration Descriptor

    μ PD720210 4. USB Descriptor Information 4.1.3 Configuration Descriptor Table 4-6. Configuration Descriptor Field Name Size(Byte) Value Description bLength Size of Descriptor (9 bytes) bDescriptorType Descriptor type (CONFIGURATION) wTotalLength 001Fh Total descriptor length (31bytes) bNumInterfaces Number of Interfaces supported (1) bConfigurationValue Configuration value (1) iConfiguration...
  • Page 30 μ PD720210 4. USB Descriptor Information Table 4-8. Endpoint Descriptor Field Name Size(Byte) Value Description bLength Size of Descriptor (7 bytes) bDescriptorType Descriptor type (ENDPOINT) bEndpointAddress Address of endpoint (IN, Endpoint1) bmAttributes Endpoint Attributes (Notification Interrupt) wMaxPacketSize Maximum packet size this endpoint (2) μ...

  • Page 31: Hub Descriptor

    μ PD720210 4. USB Descriptor Information 4.1.4 Hub Descriptor Table 4-10. Hub Descriptor Field Name Size(Byte) Value Description bLength Size of Descriptor (12 bytes) bDescriptorType Descriptor type (HUB) bNbrPorts Number of downstream facing ports (4 port) (Note 1) wHubCharacteristics Hub Characteristics (Individual Power Switching, Not part of a compound device, Individual Over current protection)(Note 2) bPwrOn2PwrGood Time from Power on to Power Good (100 ms) (Note 3)

  • Page 32: High Speed Standard Descriptor

    μ PD720210 4. USB Descriptor Information High Speed Standard Descriptor 4.2.1 Device Descriptor Table 4-11. Device Descriptor Field Name Size Value Description bLength Descriptor Length (18 bytes) bDescriptorType Device bcdUSB 0210h USB 2.0 compliant, LPM support bDeviceClass Hub Class bDeviceSubClass USB Spec.

  • Page 33: Bos Descriptor

    μ PD720210 4. USB Descriptor Information 4.2.2 BOS Descriptor Table 4-12. BOS Descriptor Field Name Size Value Description bLength Descriptor Length (5 bytes) bDescriptorType BOS Descriptor Type wTotalLength 002Ah Descriptor Total Length(42 bytes) bNumDeviceCaps Number of device capability Table 4-13. USB 2.0 Extension Field Name Size Value...

  • Page 34: Device Qualifier Descriptor

    μ PD720210 4. USB Descriptor Information 4.2.3 Device Qualifier Descriptor Table 4-16. Device Qualifier Descriptor Field Name Size Value Description bLength Descriptor Length (10 bytes) bDescriptorType Device Qualifier bcdUSB 0210h USB 2.0 compliant, LPM support bDeviceClass Hub Class bDeviceSubClass USB Spec. define bDeviceProtocol USB Spec.

  • Page 35: Interface Descriptor (Combined With Configuration Descriptor)

    μ PD720210 4. USB Descriptor Information 4.2.5 Interface Descriptor (combined with Configuration Descriptor) Table 4-18. Interface Descriptor Field Name Size Value Description bLength Descriptor Length (9 bytes) bDescriptorType Interface bInterfaceNumber bAlternateSetting bNumEndpoints 1 Endpoint bInterfaceClass bInterfaceSubClass bInterfaceProtocol iInterface No String 4.2.6 Endpoint Descriptor (combined with Configuration Descriptor) Table 4-19.

  • Page 36: Interface Descriptor (Combined With Other Speed Configuration Descriptor)

    μ PD720210 4. USB Descriptor Information 4.2.8 Interface Descriptor (combined with Other Speed Configuration Descriptor) Table 4-21. Interface Descriptor Field Name Size Value Description bLength Descriptor Length (9 bytes) bDescriptorType Interface bInterfaceNumber bAlternateSetting bNumEndpoints 1 Endpoint bInterfaceClass bInterfaceSubClass bInterfaceProtocol iInterface No String 4.2.9 Endpoint Descriptor (combined with Other Speed Configuration Descriptor)

  • Page 37: Class Specified Hub Class Descriptor

    μ PD720210 4. USB Descriptor Information 4.2.10 Class Specified Hub Class Descriptor Table 4-23. Class Specified Hub Class Descriptor Field Name Size Value Description bDescLength Descriptor Length(9 bytes) bDescriptorType Hub Class bNbrPorts 4 downstream facing ports(Note 1) wHubCHaracteristics 00A9h 01b(D1:D0) Individual port power switching(Note 1) 0b(D2) Not compound device(Note 2)

  • Page 38: Full Speed Standard Descriptor

    μ PD720210 4. USB Descriptor Information Full Speed Standard Descriptor 4.3.1 Device Descriptor Table 4-24. Device Descriptor Field Name Size Value Description bLength Descriptor Length (18 bytes) bDescriptorType Device bcdUSB 0210h USB 2.0 compliant, LPM support bDeviceClass Hub Class bDeviceSubClass USB Spec.

  • Page 39: Superspeed Usb

    μ PD720210 4. USB Descriptor Information 4.3.2.2 SuperSpeed USB Table 4-27. SuperSpeed USB Field Name Size Value Description bLength Descriptor Length (10 bytes) bDescriptorType DEVICE CAPABILITY Descriptor Type bDevCapabilityType SuperSpeed USB bmAttributes LTM Unsupported wSpeedSupported 000Eh Support FS, HS, SS bFunctionalitySupport Full Speed bU1DevExitLat...

  • Page 40: Configuration Descriptor

    μ PD720210 4. USB Descriptor Information 4.3.4 Configuration Descriptor Table 4-30. Configuration Descriptor Field Name Size Value Description bLength Descriptor Length (9 bytes) bDescriptorType Configuration wTotalLength 0019h Descriptor Total Length (25 bytes) bNumInterfaces 1 interface bConfigurationValue Config Value is 1 iConfiguration No String bmAttributes...

  • Page 41: Other Speed Configuration Descriptor

    μ PD720210 4. USB Descriptor Information 4.3.7 Other Speed Configuration Descriptor Table 4-33. Other Speed Configuration Descriptor Field Name Size Value Description bLength Descriptor Length (9 bytes) bDescriptorType Other Speed Configuration wTotalLength 0019h Descriptor Total Length(25 bytes) bNumInterfaces 1 interface bConfigurationValue Configuration Value is 1 iConfiguration...

  • Page 42: Pin Strapping

    μ PD720210 5. Pin Strapping 5. Pin Strapping Pin Strapping Settings Some pins are used to set the configuration of the chip functions, by being pulled up or down at the end of chip reset (RESETB). The list of the configurations is shown Table 5-1. The below pins are associated with the strapping setting.

  • Page 43: Led Function

    μ PD720210 5. Pin Strapping 5.1.2 LED function This configuration sets whether the LED function is used or not. [Pin Strapping Setting] Table 5-3. LED Function SPISCK/ SPISO/ SPISI/ LED1B/ Configuration SPISCB Definition LED4B LED3B LED2B SUSPEND LED function LED function enable Others LED function disable LED function disable...

  • Page 44: Non-Removable Ports

    μ PD720210 5. Pin Strapping 5.1.4 Non-Removable Ports This configuration sets the mode of Port 1 to Port 4. Port 1 to Port 4 can be set to Non-removable or removable. [Pin Strapping Setting] Table 5-5. Non-Removable Ports Configuration OCI4B OCI3B OCI2B OCI1B...

  • Page 45: Battery Charging Mode

    μ PD720210 5. Pin Strapping 5.1.6 Battery Charging mode This configuration sets the Battery Charging mode. [Pin Strapping Setting] Table 5-7. Battery Charging Mode SPISCK/ SPISO/ SPISI/ LED1B/ Configuration Definition LED4B LED3B LED2B SUSPEND Battery Charging Function CDP (1) This table is effective, when CDP (2) SPICSB =0 CDP (3)

  • Page 46: Gio Function

    μ PD720210 5. Pin Strapping 5.1.7 GIO function This configuration sets the GIO pin function. GIO pin output can be set to CLKOUT signal or SUSPEND signal. The CLKOUT function is intended for use by a non-removable device that needs a 24 MHz clock, without having to use a dedicated 24 MHz oscillator for the downstream device.

  • Page 47: Ppon1B Output Function

    μ PD720210 5. Pin Strapping 5.1.9 PPON1B Output function This configuration sets the PPON1B pin function. [Pin Strapping Setting] Table 5-10. PPON1B Output Function PPON1B/ Configuration Definition NRDRSTB PPON1B/NRDRSTB Output Port1 Non Removable Device Reset Port1 PPONB R19UH0093EJ0200 Rev.2.00 Page 37 of 59 May 26, 2014...

  • Page 48: Functions Description

    μ PD720210 6. Functions Description 6. Functions Description Battery Charging μ PD720210 supports the USB Battery Charging Function. It is possible to permit devices to draw VBUS current μ in excess of the original USB2.0 specification for charging on the downstream port of PD720210.

  • Page 49: Battery Charging Mode

    μ PD720210 6. Functions Description 6.1.1 Battery Charging Mode [Without the external SPI ROM] μ PD720210 supports the Battery charging modes shown in Table 6-1. In this case, modes are set by pin strapping. Table 6-1. Battery Charging Mode SPISCK/ SPISO/ Battery Charging port type SPISI/...
  • Page 50 μ PD720210 6. Functions Description Table 6-2. Battery Charging Mode Battery Charging port type No connection to host/ During operation Suspend state SDP (Battery Charging is disable.) CDP only FVO2 Auto FVO1 Boot conditions of each BC mode are the following. The following conditions must all be met. [CDP] ・Over current does not occur.

  • Page 51: Hw Configuration Requirement

    μ PD720210 6. Functions Description 6.1.2 HW configuration requirement Some Battery charging functions change the port type in each device state. VBUS shall be cut off temporarily when the charging port is changed, as required by the Battery Charging Specification. Thus, VBUS shall be controlled by a power switch controlled by PPONxB for each port.

  • Page 52: Remote Wake Up Function

    μ PD720210 6. Functions Description Remote Wake Up function 6.2.1 Remote Wake Up function μ PD720210 supports the Remote Wake Up function in all BC modes. When a Full-Speed device or μ Low-Speed device is connected to the downstream port and enumerated by the system, and then PD720210 transitions to the suspend state, the PPONxB of a downstream port in BC mode is not asserted, to keep VBUS μ...

  • Page 53: Clock Output Function

    μ PD720210 6. Functions Description Clock Output Function μ PD720210 can provide the 24MHz or 12MHz reference clock and reset signal to a non-removable device. This section describes the clock output function for the non-removable device connected to the downstream μ...

  • Page 54: Clock Output Function Settings

    μ PD720210 6. Functions Description 6.3.2 Clock Output Function Settings Table 6-3 shows the clock output function settings. These settings can be changed with the ROM Writing Tool for Windows. When the External ROM is not used, all of the settings are in default value except for the Pin Function, depending on the pin strapping setting (Refer to section 5.1.7.

  • Page 55: Clock Output Function Control

    μ PD720210 6. Functions Description 6.3.3 Clock Output Function Control μ When “Output Clock Control” is set to the controllable clock output, PD720210 stops the clock output during the suspend state. Table 6-4 shows the stop condition of the clock output. Table 6-5 shows the start condition of the clock output after stopping the clock output.

  • Page 56: Peripheral Component Connection

    μ PD720210 7. Peripheral Component Connection 7. Peripheral Component Connection Unused Pin Connection Table 7-1. Unused Pin Connection Direction Connection Method U2DPx Connect to GND, directly or through a resistor U2DMx Connect to GND, directly or through a resistor U3TXDPx Open U3TXDNx Open...

  • Page 57: Usb Upstream Port Connection

    μ PD720210 7. Peripheral Component Connection USB Upstream Port Connection Figure 7-1. USB Upstream Port Connection μ Remark: The maximum capacitance that can be placed on VBUS line should be less than 10 F for the inrush current limiting requirement specified by USB 3.0 specification. Please see section 11.4.4.1 in USB 3.0 specification for details.

  • Page 58: Usb Downstream Port Connection

    μ PD720210 7. Peripheral Component Connection USB Downstream Port Connection Figure 7-2. USB Downstream Port Connection From power switch output μ PD720210 ƒÊ PD720200A Signals USB2.0 Down stream port Signals USB3.0 Standard-A receptacle connector VBUS U2DMx U2DPx μ PD720210 ƒÊ PD720200A Signals USB3.0 Signals...

  • Page 59: Vbus Power Switching Connection

    μ PD720210 7. Peripheral Component Connection VBUS Power Switching Connection 7.4.1 USB Power Switch Figure 7-3. VBUS Switch Connection 3.3V PD720210 VBUS Switch 4.7 K Ω Downstream PPONxB USB Connector VBUS OCIxB 10uF 150uF Total capacitance should be more than 120uF as defined in USB3.0 standard μ...

  • Page 60: Current Limiter

    μ PD720210 7. Peripheral Component Connection 7.4.2 Current Limiter Figure 7-4. VBUS Current Limiter Connection μ Remark: Total capacitance of VBUS should be no less than 120 F. See 11.4.4.1 of USB 3.0 Specification. R19UH0093EJ0200 Rev.2.00 Page 50 of 59 May 26, 2014...

  • Page 61: Crystal Connection

    μ PD720210 7. Peripheral Component Connection Crystal Connection Figure 7-5. Crystal Connection Remark: Clock shall be 24 MHz within 100 ppm. Moreover optimal crystal parameters and RC component values may be affected by the PCB layout. R19UH0093EJ0200 Rev.2.00 Page 51 of 59 May 26, 2014...

  • Page 62: Reset Connection

    μ PD720210 7. Peripheral Component Connection RESET Connection Figure 7-6. Reset Connection 3.3V μ PD720210 10 KΩ RESETB 10uF Remark: The power-on-reset should be longer than 10 ms. R19UH0093EJ0200 Rev.2.00 Page 52 of 59 May 26, 2014...

  • Page 63: Rref Connection

    μ PD720210 7. Peripheral Component Connection RREF Connection Figure 7-7. RREF Connection Remark: The board layout should minimize the total path length from RREF through the resistor to GND and path length to GND. GND must be stable. Due to analog sensitivity, 1.60 kΩ within ±1% must be used, and two or more resistors in series or parallel should not be used in place of a single 1.60 kΩ...

  • Page 64: Internal Ldo (5V  3.3V) Connection (In Use)

    μ PD720210 7. Peripheral Component Connection Internal LDO (5V  3.3V) Connection (in use) Figure 7-8. Internal LDO Connection in use μ Remark: 4.7 F capacitor is required, and the capacitor should be placed close to V33OUT pin. R19UH0093EJ0200 Rev.2.00 Page 54 of 59 May 26, 2014...

  • Page 65: Internal Ldo (5 V  3.3 V) Connection (Out Of Use)

    μ PD720210 7. Peripheral Component Connection Internal LDO (5 V  3.3 V) Connection (out of use) Figure 7-9. Internal LDO Connection out of use Case 1: Internal Switching Regulator is used. PD720210 V50IN Case 2: Internal Switching Regulator is NOT used.

  • Page 66: Internal Switching Regulator (5 V  1.05 V) Connection (In Use)

    μ PD720210 7. Peripheral Component Connection 7.10 Internal Switching Regulator (5 V  1.05 V) Connection (in use) Figure 7-10. Internal Switching Regulator Connection in use μ PD720210 56Ω 68Ω PGDRV 4.7uF NGDRV 1.05V QS6M3 4.7uH ROHM 470 KΩ ILIM 22uF V10FB It is necessary to use the correct Field Effect Transistor (FET) for the part of this switching regulator.

  • Page 67: Internal Switching Regulator (5 V  1.05 V) Connection (Out Of Use)

    μ PD720210 7. Peripheral Component Connection 7.11 Internal Switching Regulator (5 V  1.05 V) Connection (out of use) Figure 7-11. Internal Switching Regulator Connection out of use R19UH0093EJ0200 Rev.2.00 Page 57 of 59 May 26, 2014...

  • Page 68: External Serial Rom Connection

    μ PD720210 7. Peripheral Component Connection 7.12 External Serial ROM Connection Figure 7-12. External Serial ROM Connection Remark: Recommended Serial ROMs are refer to Chapter 3.2. Remark: SPISCK signal has to be pulled up as in Figure 7-12, when the external ROM is used. Other pins are also used for some function settings.

  • Page 69: Led Control Connection

    μ PD720210 7. Peripheral Component Connection 7.13 LED Control Connection Figure 7-13. LED Control Connection 3.3V 10kΩ uPD720210 LED1B/SUSPEND SPISI/LED2B LED Blinking circuit SPISO/LED3B SPISCK/LED4B SPICSB 10kΩ R19UH0093EJ0200 Rev.2.00 Page 59 of 59 May 26, 2014...
  • Page 70 μ REVISION HISTORY PD720210 User’s Manual: Hardware Rev. Date Description Page Summary 1.00 Sep. 26, 2012 Document promoted from Preliminary to v1.00. (Document No. R19UH0093E) 2.00 May. 26. 2014 Modified the overall chapter. C - 1...
  • Page 71 μ PD720210 User’s Manual: Hardware Publication Date: Rev. 1.00 Sep 26, 2012 Rev. 2.00 May 26, 2014 Published by: Renesas Electronics Corporation...
  • Page 72 http://www.renesas.com SALES OFFICES Refer to "http://www.renesas.com/" for the latest and detailed information. Renesas Electronics America Inc. 2801 Scott Boulevard Santa Clara, CA 95050-2549, U.S.A. Tel: +1-408-588-6000, Fax: +1-408-588-6130 Renesas Electronics Canada Limited 1101 Nicholson Road, Newmarket, Ontario L3Y 9C3, Canada Tel: +1-905-898-5441, Fax: +1-905-898-3220 Renesas Electronics Europe Limited Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K...
  • Page 73 μ PD720210 R19UH0093EJ0200...

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