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Appendix B - Read/Write Register List
H
o
d l
n i
g
R
e
. g
B
t i
C
o
l i
D
e
c s
i r
40033
P Timer Setting
40034
W Timer Setting
40035
T3/W3 Timer Setting (Mirror of 40038)
40036
DW Timer Setting
40037
T Timer Setting
40038
T3/W3 Timer Setting (Mirror of 40035)
40039
DT Timer Setting
40040
U Timer Setting
40041
S1 Undervolt Restore
40042
S1 Undervolt Fail
40043
S2 Undervolt Restore
40044
S2 Undervolt Fail
40045
S1 Underfreq Restore
40046
S2 Underfreq Restore
40047
Net Control 0
0
65 Reset Time S2 Available
1
6 6
A
r a l
m
2
67
Unused
3
8 6
E Y
C
o
n
4
9 6
Y
N
C
o
n
5
70 No Load Test Control
6
71 Load Test Control
7
72 Fast Load Test Control
40048
Net Control 1
0
73 Unused
1
4 7
5 S
C
o
n
2
5 7
S
2 1
C
o
3
6 7
S L
C
o
n
4
7 7
Q
7
C
o
n
5
8 7
Q
3
C
o
n
6
9 7
A
x u
2
C
7
0 8
T
M
S
C
40078
UMD Timer Setting
40079
Phase Imbalance Timer Setting
40080
Phase Imbalance Fail Setting
40081
Phase Imbalance Restore Setting
4
0 0
4 8
1 S
O
e v
40085
S1 Overvolt Restore
4
0 0
6 8
2 S
O
e v
40087
S2 Overvolt Restore
40088
S1 Underfreq Fail
4
0 0
9 8
1 S
O
e v
40090
S1 Overfreq Restore
40091
S2 Underfreq Fail
4
0 0
2 9
2 S
O
e v
40093
S2 Overfreq Restore
ABB Zenith
I
t p
o i
n
S
e l i
n
e c
r t
l o
r t
l o
r t
l o
n
r t
l o
r t
l o
r t
l o
r t
l o
o
n
r t
l o
o
n
r t
l o
v r
l o
F t
l i a
v r
l o
F t
l i a
f r
e r
q
F
l i a
f r
e r
q
F
l i a
MX150/MX250 Series Modbus Network Card (71R-2200)
R
a
n
g
e
N
t o
0 - 1000 1/100 of a second
0 - 300 seconds
0 - 60 seconds
0 - 600 seconds
0 - 3600 seconds
0 - 60 seconds
0 - 600 seconds
0 - 3600 seconds
85 - 100 percent
Must be at least 2 > S1 UV Fail
75 - 98 percent
Must be at least 2 < S1 UV Restore
85 - 100 percent
Must be at least 2 > S2 UV Fail
75 - 98 percent
Must be at least 2 < S2 UV Restore
90 - 100 percent
Must be at least 2 > S1 UF Fail
90 - 100 percent
Must be at least 2 > S2 UF Fail
1 = Reset
1
=
S
e l i
n
e c
A
r a l
m
1
=
B
p y
a
s s
o t
2 S
1
=
B
p y
a
s s
o t
1 S
1 = Start Test
1 = Start Test
1 = Start Test
1
=
O
n
0 ,
=
O
f f
1
=
O
n
0 ,
=
O
f f
1
=
O
n
0 ,
=
O
f f
1
=
O
n
0 ,
=
O
f f
1
=
O
n
0 ,
=
O
f f
1
=
O
n
0 ,
=
O
f f
1
=
O
n
0 ,
=
O
f f
0 - 300 seconds
10 - 30 seconds
5 - 20 percent
3 - 18 percent
1
5 0
1 -
0 1
p
r e
e c
t n
M
u
103 - 108 percent
Must be at least 2 < S1 OV Fail
1
5 0
1 -
0 1
p
r e
e c
t n
M
u
103 - 108 percent
Must be at least 2 < S2 OV Fail
88 - 98 percent
Must be at least 2 < S1 UF Restore
1
3 0
1 -
5 0
p
r e
e c
t n
M
u
102 - 104 percent
Must be at least 1 < S1 OF Fail
88 - 98 percent
Must be at least 2 < S2 UF Restore
1
3 0
1 -
5 0
p
r e
e c
t n
M
u
102 - 104 percent
Must be at least 1 < S2 OF Fail
s e
t s
b
e
a
l t
a e
t s
2
>
1 S
O
V
R
s e
o t
e r
t s
b
e
a
l t
a e
t s
2
>
2 S
O
V
R
s e
o t
e r
t s
b
e
a
l t
a e
t s
1
>
1 S
O
F
R
s e
o t
e r
t s
b
e
a
l t
a e
t s
1
>
2 S
O
F
R
s e
o t
e r
13
I
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