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Sony DCR-PC115 Service Manual page 11

Digital video camera recorder
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For Schematic Diagram
• Refer to page 4-19 for printed wiring board.
• Refer to page 4-92 for waveforms.
1
2
3
4
VC-270 BOARD(6/18)
NO MARK:REC/PB MODE
DV PROCESSOR(JC BLOCK)
:Voltage measurement is impossible
for the CSP ICs and the Transistors
A
-REF.NO.:20,000 SERIES-
that are shown with the
mark.
XX MARK:NO MOUNT
FB5302
0uH
D_1.9V
A_2.8V
FB5301
0uH
D_2.8V
D_1.5V
FB5304
46
TO(18/18)
0uH
FB5303
0uH
C5302
C5301
B
0.1u
0.1u
B
B
C5303
0.1u
B
REG_GND
SWP
TO(8/18,14/18
47
SWP
17/18(CN008))
C
WRX
WRX
RDX
RDX
ALE
ALE
MCCE
MCCE
MCDA0
MCDA0
MCDA1
MCDA1
MCDA2
D
48
MCDA2
TO(7/18,14/18)
MCDA3
MCDA3
MCDA4
MCDA4
MCDA5
MCDA5
MCDA6
MCDA6
XCS_SFD
MCDA7
MCDA7
WRX
MCDA8
RDX
MCDA8
MCDA9
DRP
MCDA9
E
FRRV
SWP
FRRV
TRRT
ALE
TRRT
DRP
MCCE
DRP
XRST_VSP
MCDA8
XRST_VSP
49
TO(14/18)
SCOD_WINDOW
MCDA9
SCOD_WINDOW
VREF
MCDA0
VREF
TRRV
MCDA1
TRRV
XCS_SFD
MCDA2
XCS_SFD
F
XCS_VFD
MCDA3
XCS_VFD
MCDA4
VFI_OE
MCDA5
VSP_SO
VSP_SO
MCDA6
27
TO(2/18,9/18
XVSP_SCK
14/18,16/18)
XVSP_SCK
MCDA7
SCOD_WINDOW
XRST_VSP
G
LINE_OUT_V
C5339
XX
OSDHD
C5304
OSDR
0.01u
B
OSDL
VSP_SI
VSP_SI
OSDP
COL3
H
COL2
28
TO(2/18)
TD_1-2
TD_1-2
AFCK
COL1
AFCK
XSWE
COL0
XSWE
AFCK
SSS
SSS
R5303
0
VFO_HD
I
VFO_HD
VFI_Y0
VFO_VD
VFO_VD
VFO_Y0
VFO_OE
VFO_OE
VFI_Y1
VFO_Y0
VFO_Y0
VFO_Y1
VFO_Y1
VFO_Y1
VFI_Y2
VFO_Y2
VFO_Y2
VFO_Y2
VFO_Y3
VFO_Y3
VFI_Y3
VFO_Y4
VFO_Y4
VFO_Y3
VFO_Y5
J
VFO_Y5
VFI_Y4
VFO_Y6
VFO_Y6
VFO_Y4
VFO_Y7
VFO_Y7
VFI_Y0
VFI_Y0
VFI_Y1
VFI_Y1
VFI_Y5
VFI_Y2
VFI_Y2
VFO_Y5
VFI_Y3
16
VFI_Y3
TO(2/18)
VFI_Y6
VFI_Y4
VFI_Y4
VFO_Y6
VFI_Y5
K
VFI_Y5
VFI_Y7
VFI_Y6
VFI_Y6
VFO_Y7
VFI_Y7
VFI_Y7
VFI_C0
VFI_C0
VFI_C1
VFI_C1
VFI_C2
VFI_C2
VFI_C3
VFI_C3
VFIO_C4
VFIO_C4
VFIO_C5
L
VFIO_C5
VFIO_C6
VFIO_C6
VFIO_C7
VFIO_C7
VFI_HD
VFI_HD
VFI_VD
VFI_VD
VFI_OE
VFI_OE
M
SIGNAL PATH
VIDEO SIGNAL
N
SIGNAL PATH
AUDIO
CHROMA
Y
Y/CHROMA
SIGNAL
REC
Ref.signal
PB
16
5
6
7
8
9
16
C5305
0.1u
B
C5307
X5301
10p
24.576MHz
CH
R5556
C5308
0
10p
1005
CH
R5404
XX
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
MSCSS
WRX
RDX
DRP
SWP
ALE
MCCE
MCHA0
(MCDA8)
MCHA1
(MCDA9)
MCDA0
MCDA1
MCDA2
MCDA3
MCDA4
MCDA5
MCDA6
MCDA7
SCWIN
XRST
F358
OSDVD
OSDHD
RVDD4
(D_1.5V-2)
RVSS4
OSDR
IC5302
OSDL
DV SIGNAL PROCESSOR
OSDP
COL3
COL2
HVDD4
(D_2.8V-1)
IC5302
HVSS4
CSP(CHIP SIZE PACKAGE)IC
COL1
COL0
AFCKI
RVDD5
(D_1.5V-2)
RVSS5
YI0
YO0
YI1
YO1
YI2
YO2
YI3
YO3
YI4
YO4
RVDD6
(D_1.5V-2)
RVSS6
YI5
YO5
YI6
YO6
YI7
YO7
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36
C5306
0.01u
REC
REC/PB
PB
4-33
10
11
12
13
R5521
100
C5315
R5510
0.001u
270
L5301
B
0.56uH
C5310
C5312
0.01u
2520
0.01u
15
C5325
B
B
0.01u
B
R5455
R5519
10k
2200
R5456
10k
C5326
D5302
0.001u
KV1870STL
B
C5316
D5301
0.001u
RB705D-T146
B
C5317
C5318
0.01u
0.01u
B
B
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
XSWE
SSS
DPVD
DPHD
HVSS2
(D_2.8V-1)
HVDD2
R5511
0
LVSS2
1005
(D_1.5V-1)
LVDD2
(D_1.9-1)
MVDD2
RECCK
MVSS2
RECDT
RECA2
R5512
0
RECA1
SWPS
CTRL0
CTRL1
ALLPS
PLLMSK
PLLSW
ADDT5
ADDT4
ADDT3
ADDT2
ADDT1
ADDT0
(D_1.9-1)
MVDD1
PBCK
R5513
0
MVSS1
ATF
(A_2.8V-2)
AVDD3
IREFP
AVSS3
PYOUT
(A_2.8V-2)
DVDD3
PCROUT
DVSS3
PCBOUT
(A_2.8V-2)
AVDD2
IREFE
AVSS2
EYOUT
(A_2.8V-2)
DVDD2
ECROUT
DVSS2
ECBOUT
(A_2.8V-2)
AVDD1
IREFC
AVSS1
COUT
(A_2.8V-2)
DVDD1
IREFY
DVSS1
YOUT
R5516
3300
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53 54
R5447
R5522
0
1005
330
C5319
D5303
0.001u
RB705D-T146
B
R5517
10k
L5302
R5441
1.8uH
14
0
R5518
D5304
10k
KV1870STL
C5311
C5313
C5314
0.01u
0.01u
0.01u
B
B
C5320
B
0.001u
B
C5309
0.01u
B
DCR-PC115/PC115E/PC120BT/PC120E
14
15
16
17
18
C5330
0.47u
B
XACC
1608
XACC
DIR
DIR
L5303
10uH
LBUS3
C5329
LBUS3
0.01u
LBUS2
B
LBUS2
LBUS1
LBUS1
LBUS0
C5328
LBUS0
50
TO(7/18)
10u
XENA
6.3V
XENA
TA
P
FRL
FRL
FCLR
FCLR
LCKO
LCKO
TRCK
DATA_TO_SFD2
DATA_TO_SFD2
DATA_FROM_SFD2
DATA_FROM_SFD2
14
SFD_LRCK
TO(2/18)
SFD_LRCK
SFD_BCK
SFD_BCK
SFD_FCK
SFD_FCK
XSWE
SFD_LRCK
SFD_LRCK
SSS
SFD_BCK
SFD_BCK
51
TO(16/18)
DATA_TO_SFD
DATA_TO_SFD
DATA_FROM_SFD
DATA_FROM_SFD
TCK
TCK
23
TO(2/18,10/18,
TMS
C5327
TMS
17/18(CN008))
0.01u
B
TD_2-3
115
TD_2-3
TO(10/18)
RECCK
SW_PS
SW_PS
ALL_PS
RECDT
ALL_PS
CTRL1
RECA2
CTRL1
CTRL0
RECA1
CTRL0
RECA2
SW_PS
RECA2
RECA1
CTRL0
RECA1
RECCK
RECCK
CTRL1
RECDT
RECDT
ALL_PS
PLLSW
52
TO(8/18)
PLLSW
PLLMSK
PLLMSK
PLLMSK
PLLSW
ADDT5
ADDT5
ADDT5
ADDT4
ADDT4
ADDT4
ADDT3
ADDT3
ADDT3
ADDT2
ADDT2
ADDT2
ADDT1
ADDT1
ADDT1
ADDT0
ADDT0
ADDT0
PBCK
PBCK
PBCK
L5304
10uH
C5331
0.01u
B
C5337
0.01u
C5336
B
22u
R5530
R5536
4V
C5321
1K
C5332
1K
R5514
XX
P
0.1u
R5541
3300
XX
B
R5535
XX
0.7
0.7
1
4
R5529
XX
2
5
R5527
R5539
0.1
1200
1200
3
6
± 0.5%
C5322
R5515
R5533
Q5309
3300
XX
1200
UP04401008S0
± 0.5%
BUFFER
R5528
R5534
R5540
XX
XX
XX
R5532
R5538
0
0
R5525
R5531
R5537
1k
1k
1k
± 0.5%
± 0.5%
± 0.5%
C5323
R5520
1u B
3300
R5526
0
Q5311
Q5301
C5324
XX
1u
B
XX
OSDL
OSDR
COL3
OSDP
C5335
15
14
13
12
11
R5524
2.2u
47
B
R5523
C5333
4700
0.047u
VC2
GND
B
COL2
IC5301
VC1
TEST
COL1
MB90099LGA-G-117-ER
VC0
CSP(CHIP SIZE PACKAGE)IC
EXD
COL0
C5334
VSYNC
N.C.
0.001u
LINE_OUT_V
B
HSYNC
SDR
OSDHD
1
2
3
4
5
4-34
19
20
21
ATF_ERR
53
TO(14/18)
R5542
DISP_VD
1K
DISP_HD
PANEL_G
TO(17/18
54
PANEL_R
(CN011))
Q5306
EC3101C-PM-TL
BUFFER
PANEL_B
EVF_G
EVF_R
EVF_B
55
TO(17/18
(CN003))
DISP_VD
DISP_HD
R5547
R5550
XX
XX
IC5302_Y_OUT
56
TO(9/18)
IC5302_C_OUT
R5559
R5560
0
0
R5548
150
R5545
270
Q5304
XX
SPCK
10
TO(1/18,2/18,
10/18,12/18)
IC5301
CHARACTER GENERATOR
R5543
0
R5544
10k
TO(10/18,11/18,
XSYS_RST
57
13/18,14/18,
17/18(CN003)
C5338
18/18)
0.01u
B
EVER_3.0V
58
TO(13/18,18/18)
OSD_SO
XOSD_SCK
XCS_OSD
59
TO(13/18)
LINE_OUT_V
DV PROCESSOR
VC-270 (6/18)

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