Sony DCR-PC115 Service Manual page 21

For Schematic Diagram
• Refer to page 4-19 for printed wiring board.
1 2 3
VC-270 BOARD(16/18)
NO MARK:REC/PB MODE
R :REC MODE
AUDIO PROCESS(AU BLOCK)
P :PB MODE
A
-REF.NO.:20,000 SERIES-
:Voltage measurement is impossible
XX MARK:NO MOUNT for the CSP ICs and the Transistors
that are shown with the
MIC_L
MIC_R
B AU_LINE_I/O_L
AU_LINE_I/O_R
UNRL11500AS0
Q1001 SWITCH
UNRL21000AS0
MUTE
C
Q1003
UNRL21000AS0
MUTE
D
109 TO(17/18
(CN003))
E
SP+
SP-
F
HP_L_OUT
HP_R_OUT
R1001 0 0
2200
XAUDIO_IN
99
TO(14/18)
R-0.4
G P0
Q1012
HN1C01FE-Y/GR(TPLR3)
MUTE
17
TO(2/18) IC361_ON
83 BEEP
TO(13/18)
AU_4.6V
H
AU_2.8V
110
TO(18/18)
REG_GND
TO(15/18,
106 VTR_UNREG
17/18(CN011),
I
18/18)
16
4 5 6 7
C1011
0.47u
mark.
B
C1012
0.47u
R1016
B
47k
C1003
0.47u
R1017
B
47k
C1009
Q1004
C1004 4.7u
6.3V
0.47u
A
B
R1021
1608
2200 R1024
R1019
150k
2200
C1002
C1008
C1001 10u
1u
10u
6.3V
B
6.3V
TA
TA
P
P
C1010
R1010
R1006 4.7u
1k B
1k
Q1010
Q1007
UNRL11500AS0
UNRL11500AS0
SWITCH
SWITCH
C1013
10u
6.3V
P
Q1008
UNRL21300AS0
SWITCH
C1007
10u
6.3V
P
C1005
47u
R1007 R1012 6.3V
47 47 TA
R1008 R1013
47 47
C1006
47u
R1005 R1009 0 0 R1014
6.3V
2200 2200
2200 TA
R-0.4 R-0.4 R-0.4/P0
P0 P0
R1022
10k
Q1013 R1023
HN1C01FE-Y/GR(TPLR3) 10k
MUTE
8.2
R1015
3900
4.1
4-53
8 9 10
51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35
P.MUTE_TC MIC_CTL1(R)
LINE1_IN(R) MIC_CTL2(R)
LINE1_OUT(L) EXT_MIC(R)
LINE1_OUT(R) MIC_DET1
Power_MUTE Vcc(M)
A_GND VREFM
LINE2_IN(L) IC1001 XMIC_P_SAVE
VREFH ALC_OUT(L)
AUDIO PROCESS
LINE2_IN(R) LPF_IN(L)
Vcc(H) REC_OUT(L)
IC1001
LINE2_OUT(L) A_GND
LA74208GL-TBM
LINE2_OUT(R) CSP(CHIP SIZE PACKAGE)IC REC_OUT(R)
HP_OUT(L) LPF_IN(R)
N.C. ALC_OUT(R)
N.C. Vcc(L)
N.C. PB_IN(L)
N.C. A_GND
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
C1016
0.01u
B
C1015
0.01u
B
C1017
C1014
C1018
10u
0.1u 15u
C1020
6.3V
B 4V
0.47u
TA
TA B
P
A 1608
C1019
R1026
0.1u
R1025 470
B
47 1005
R1027
8200
R3.3/P2.9
Q1011
R1020
2SD1511-R/S(TX)
33k
SWITCH
DCR-PC115/PC115E/PC120BT/PC120E
11 12 13 14
12 11 10 9
IC1002
PWADB
SDTO
PWDAB DEMO1
ADC,DAC
AOUTL DEMO0
IC1002
AOUTR AK4550VL-L VDD
CSP(CHIP SIZE PACKAGE)IC
C1021
10u 1 2 3 4
6.3V
TA P
C1024
0.47u L1003
B 22uH
C1028
C1025
C1022
1u
1u
0.47u
R1030
B
B
B 1608
470 1608
1608
R1029
470
C1023
C1054
0.47u
10u
B
6.3V
1608
C1031 P
0.01u
B C1036
10u
6.3V
P
C1037 C1038
C1029
XX 6800p
1u
B
B B
C1033
1608
6800p
B
L1001
10uH
C1027
1u
B
1608
FB1002
0uH
SIGNAL PATH
VIDEO SIGNAL
CHROMA Y Y/CHROMA
REC
PB
4-54
15 16
SFD_BCK
SFD_FCK
51
SFD_LRCK TO(6/18)
DATA_FROM_SFD
DATA_TO_SFD
XPWDA
XPWAD
DEM1
DEM0
100
TO(14/18)
XCS_AU1
ANALOG_MUTE
VSP_SO
27 TO(2/18,6/18,
9/18,14/18)
XVSP_SCK
AUDIO
SIGNAL
AUDIO PROCESS
VC-270 (16/18)