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3. CPU (HB/3040)
A. Outline
The CPU (IC3) controls finisher loads and the system synchronously,
transmitting and receiving data to and from the copier main PWB
through the serial communication line.
B. Features
The H8/3040 is a high-performance single chip microprocessor using
the 32-bit H8/300H CPU as a core, integrating peripheral functions
necessary for system configuration.
The H8/300H CPU has an internal 32-bit configuration and is
equipped with 16-bit × 16 general-purpose registers and a simple,
optimized instruction set for high-speed operation. It can handle 16M
byte linear address space.
As peripheral functions, it contains ROM, RAM, 16-bit integrated timer
unit (ITU), programmable timing patter controller (TPC), watchdog
timer (WDT), serial communication interface (SCI), A/D converter,
D/A converter, I/O port, DMA controller (DMAC), and refresh control-
ler.
C. Terminal connection diagram
P80/RFSH/IRQ0
P81/CS3/RAS/IRQ1
P82/CS2/IRQ2
P83/CS1/IRQ3
PA0/TP0/TEND0/TCLKA
PA1/TP1/TEND1/TCLKB
PA2/TP2/TIOCA0/TCLKC
PA3/TP3/TIOCB0/TCLKD
PA4/TP4/TIOCA1/A23
PA5/TP5/TIOCB1/A22
PA6/TP6/TIOCA2/A21
PA7/TP7/TIOCB2/A20
A Vcc
76
Vref
77
P70/AN0
78
P71/AN1
79
P72/AN2
80
P73/AN3
81
P74/AN4
82
P75/AN5
83
P76/AN6/DA0
84
P77/AN7/DA1
85
A Vss
86
87
88
89
90
P84/CS0
91
Vss
92
93
94
95
96
97
98
99
100
H8/3040
9 – 2
AR-FN3
50
A13/P25
49
A12/P24
48
A11/P23
47
A10/P22
46
A9/P21
45
A8/P20
44
Vss
43
A7/P17
42
A6/P16
41
A5/P15
40
A4/P14
39
A3/P13
38
A2/P12
37
A1/P11
36
A0/P10
35
Vcc
34
D15/P37
33
D14/P36
32
D13/P35
31
D12/P34
30
D11/P33
29
D10/P32
28
D9/P31
27
D8/P30
26
D7/P47
8/19/1999
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