Asus AAEON GENE-BT05 User Manual
Asus AAEON GENE-BT05 User Manual

Asus AAEON GENE-BT05 User Manual

3.5 subcompact board
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GENE-BT05
3.5" Subcompact Board
th
User's Manual 10
Ed
Last Updated: October 5, 2021

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Summary of Contents for Asus AAEON GENE-BT05

  • Page 1 GENE-BT05 3.5” Subcompact Board User’s Manual 10 Last Updated: October 5, 2021...
  • Page 2 Copyright Notice This document is copyrighted, 2021. All rights are reserved. The original manufacturer reserves the right to make improvements to the products described in this manual at any time without notice. No part of this manual may be reproduced, copied, translated, or transmitted in any form or by any means without the prior written permission of the original manufacturer.
  • Page 3 Acknowledgements All other products’ name or trademarks are properties of their respective owners. Microsoft Windows is a registered trademark of Microsoft Corp. ⚫ Intel® and Celeron® are registered trademarks of Intel Corporation ⚫ Intel Atom™ is a trademark of Intel Corporation ⚫...
  • Page 4 Packing List Before setting up your product, please make sure the following items have been shipped: Item Quantity GENE-BT05 MB Heatsink If any of these items are missing or damaged, please contact your distributor or sales representative immediately. Preface...
  • Page 5 About this Document This User’s Manual contains all the essential information, such as detailed descriptions and explanations on the product’s hardware and software features (if any), its specifications, dimensions, jumper/connector settings/definitions, and driver installation instructions (if any), to facilitate users in setting up their product. Users may refer to the product page at AAEON.com for the latest version of this document.
  • Page 6 Safety Precautions Please read the following safety instructions carefully. It is advised that you keep this manual for future references All cautions and warnings on the device should be noted. Make sure the power source matches the power rating of the device. Position the power cord so that people cannot step on it.
  • Page 7 If any of the following situations arises, please the contact our service personnel: Damaged power cord or plug Liquid intrusion to the device iii. Exposure to moisture Device is not working as expected or in a manner as described in this manual The device is dropped or damaged Any obvious signs of damage displayed on the device...
  • Page 8 FCC Statement This device complies with Part 15 FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received including interference that may cause undesired operation.
  • Page 9 China RoHS Requirements (CN) 产品中有毒有害物质或元素名称及含量 AAEON Main Board/ Daughter Board/ Backplane 有毒有害物质或元素 部件名称 铅 汞 镉 六价铬 多溴联苯 多溴二苯醚 (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) 印刷电路板 ○ ○ ○ ○ ○ ○ 及其电子组件 外部信号 ○ ○ ○ ○ ○ ○ 连接器及线材...
  • Page 10 China RoHS Requirement (EN) Poisonous or Hazardous Substances or Elements in Products AAEON Main Board/ Daughter Board/ Backplane Poisonous or Hazardous Substances or Elements Hexavalent Polybrominated Polybrominated Component Lead Mercury Cadmium Chromium Biphenyls Diphenyl Ethers (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) PCB &...
  • Page 11: Table Of Contents

    Table of Contents Chapter 1 - Product Specifications..................1 Specifications ......................2 Block Diagram ......................5 Chapter 2 – Hardware Information ..................6 Dimensions ....................... 7 Jumpers and Connectors ..................11 List of Jumpers ......................15 2.3.1 LVDS Port Backlight Inverter VCC Selection (JP1) ......15 2.3.2 LVDS Port Backlight Lightness Control Mode Selection (JP3)..
  • Page 12 2.4.10 LPC Port (CN11) ..................29 2.4.11 COM Port 2 (CN12) ................30 2.4.12 COM Port 3 (CN14) ................33 2.4.13 COM Port 4 (CN15) ................36 2.4.14 Digital I/O Port (CN16) ............... 37 2.4.15 USB 2.0 Port 3 (CN17) ................ 38 2.4.16 USB 2.0 Port 2 (CN18) ................
  • Page 13 3.4.1.1 S5 RTC Wake Settings ............. 60 3.4.2 Super IO Configuration............... 61 3.4.2.1 Serial Port 1 Configuration ............. 62 3.4.2.2 Serial Port 2 Configuration ............. 63 3.4.2.3 Serial Port 3 Configuration ............. 64 3.4.2.4 Serial Port 4 Configuration ............. 65 3.4.2.5 Smart Fan Mod Configuration ..........
  • Page 14 Appendix A - Watchdog Timer Programming ..............99 Watchdog Timer Registers ................100 Watchdog Sample Program ................101 Appendix B - I/O Information ..................... 104 I/O Address Map ....................105 Memory Address Map ..................106 IRQ Mapping Chart ..................... 107 DMA Channel Assignments ................
  • Page 15: Chapter 1 - Product Specifications

    Chapter 1 Chapter 1 - Product Specifications...
  • Page 16: Specifications

    Specifications System Form Factor 3.5'' Subcompact Board Processor Intel® Atom™/ Celeron® Processor: Celeron® J1900 (4C/4T, 2.00GHz, up to 2.42GHz) Celeron® N2930 (4C/4T, 1.83GHz, up to 2.16GHz) Celeron® N2807 (2C/2T, 1.58GHz, up to 2.16GHz) Atom™ E3845 (4C/4T, 1.91 GHz) Atom™ E3825 (2C/2T, 1.33 GHz) CPU TDP Celeron®...
  • Page 17 Power Power Requirement +12V Only Power Supply Type AT/ATX Connector Phoenix 2-pin Connector Power Consumption (Typical) 1.73A at +12V with Intel® Celeron® J1900, DDR3L 1600MHz 8GB memory Power Consumption (Max) 1.88A at +12V with Intel® Celeron® J1900, DDR3L 1600MHz 8GM memory Display Controller Intel®...
  • Page 18 Internal I/O USB2.0 x 2 Serial Port COM2, COM3 (RS232/422/485, supports 5V/12V/RI) COM4 (RS232) Video LVDS x 1 SATA SATA II x 1 +5V SATA Power Connector x 1 Audio Audio Header x 1 DIO/GPIO 8-bit SMBus/I2C I2C/SMBus x 1 (Default SMBus) Touch 4/5/8-wire Touch Controller x 1 (optional) DC Fan x 1 (Optional: Smart Fan)
  • Page 19: Block Diagram

    Environment Operating Temperature 32°F ~ 140°F (0°C ~ 60°C) Storage Temperature -40°F ~ 176°F (-40°C ~ 80°C) Operating Humidity 0% ~ 90% relative humidity, non-condensing MTBF (Hours) 344,859 Certification CE/FCC Class A Block Diagram Chapter 1 – Product Specifications...
  • Page 20: Chapter 2 - Hardware Information

    Chapter 2 Chapter 2 – Hardware Information...
  • Page 21: Dimensions

    Dimensions Standard Version (Component Side) Chapter 2 – Hardware Information...
  • Page 22 Standard Version (Solder Side) Chapter 2 – Hardware Information...
  • Page 23 Advanced Version (Component Side) Chapter 2 – Hardware Information...
  • Page 24 Advanced Version (Solder Side) Chapter 2 – Hardware Information...
  • Page 25: Jumpers And Connectors

    Jumpers and Connectors Standard Version (Component Side) Chapter 2 – Hardware Information...
  • Page 26 Standard Version (Solder Side) Chapter 2 – Hardware Information...
  • Page 27 Advanced Version (Component Side) Chapter 2 – Hardware Information...
  • Page 28 Advanced Version (Solder Side) Chapter 2 – Hardware Information...
  • Page 29: List Of Jumpers

    List of Jumpers Please refer to the table below for all of the board’s jumpers that you can configure for your application Label Function LVDS Port Backlight Inverter VCC Selection LVDS Port Backlight Lightness Control Mode Selection LVDS Port Operating VDD Selection COM3 Pin8 Function Selection COM2 Pin8 Function Selection JP17...
  • Page 30: Lvds Port Operating Vdd Selection (Jp4)

    2.3.3 LVDS Port Operating VDD Selection (JP4) 1 2 3 +3.3V (Default) 2.3.4 COM3 Pin8 Function Selection (JP8) +12V Ring (Default) 2.3.5 COM2 Pin8 Function Selection (JP9) +12V Ring (Default) 2.3.6 Auto Power Button Enable/Disable Selection (JP17) Disable Enable (Default) Chapter 2 –...
  • Page 31: Front Panel Connector (Jp19)

    2.3.7 Front Panel Connector (JP19) Function Function PWR_BTN- PWR_BTN+ HDD_LED- HDD_LED+ SPEAKER- SPEAKER+ PWR_LED PWR_LED+ H/W RESET- H/W RESET+ 2.3.8 Touchscreen 4/ 5/ 8-Wire Selection (JP20) 4/8-Wire Mode (Default) 5-Wire Mode 2.3.9 Clear CMOS Jumper (JP21) Normal (Default) Clear CMOS Chapter 2 –...
  • Page 32: List Of Connectors

    List of Connectors Please refer to the table below for all of the board’s connectors that you can configure for your application Label Function +5VSB Output w/SMBus LVDS Port Inverter / Backlight Connector +5V Output for SATA HDD External +5VSB Input SATA Port External +12V Input LVDS Port...
  • Page 33: 5Vsb Output W/Smbus (Cn1)

    Label Function CN28 COM Port 1 (D-SUB 9) CN29 HDMI Port CN30 VGA Port CN31 Battery CN33 CFast Slot CN34 DDR3L SO-DIMM Slot CN35 UIM Card Socket CN37 Mini Card Slot (Full-Size Mini Card) 2.4.1 +5VSB Output w/SMBus (CN1) Pin Name Signal Type Signal Level SMB_DATA...
  • Page 34: Lvds Port Inverter / Backlight Connector (Cn3)

    2.4.2 LVDS Port Inverter / Backlight Connector (CN3) Pin Name Signal Type Signal Level BKL_PWR +5V / +12V BKL_CONTROL BKL_ENABLE +3.3V Note 1: LVDS BKL_PWR can be set to +5V or +12V by JP1. Note 2: LVDS BKL_CONTROL can be set by JP3. Note 3: Driving current of Pin 1/BKL_PWR supports up to 1.5A.
  • Page 35: External +5Vsb Input (Cn5)

    2.4.4 External +5VSB Input (CN5) PS_ON# +5VSB Pin Name Signal Type Signal Level PS_ON# +3.3V +5VSB Note: Since every power supply discharge design is different, it is recommended to wait at least 3 seconds before restarting after shutting down to ensure ATX power is fully discharged;...
  • Page 36: Sata Port (Cn6)

    2.4.5 SATA Port (CN6) Pin Name Signal Type Signal Level SATA_TX+ DIFF SATA_TX- DIFF SATA_RX- DIFF SATA_RX+ DIFF 2.4.6 External +12V Input (CN7) Pin Name Signal Type Signal Level +12V +12V Chapter 2 – Hardware Information...
  • Page 37: Lvds Port (Cn8)

    2.4.7 LVDS Port (CN8) PIN 29 PIN 30 PIN 1 PIN 2 Pin Name Signal Type Signal Level BKL_ENABLE BKL_CONTROL LCD_PWR +3.3V/+5V LVDS_A_CLK- DIFF LVDS_A_CLK+ DIFF LCD_PWR +3.3V/+5V LVDS_DA0- DIFF LVDS_DA0+ DIFF LVDS_DA1- DIFF LVDS_DA1+ DIFF LVDS_DA2- DIFF LVDS_DA2+ DIFF LVDS_DA3- DIFF Chapter 2 –...
  • Page 38 Pin Name Signal Type Signal Level LVDS_DA3+ DIFF DDC_DATA +3.3V DDC_CLK +3.3V LVDS_DB0- DIFF LVDS_DB0+ DIFF LVDS_DB1- DIFF LVDS_DB1+ DIFF LVDS_DB2- DIFF LVDS_DB2+ DIFF LVDS_DB3- DIFF LVDS_DB3+ DIFF LCD_PWR +3.3V/+5V LVDS_B_CLK- DIFF LVDS_B_CLK+ DIFF Note 1: LVDS LCD_PWR can be set to +3.3V or +5V by JP4. Note 2: Driving current of LCD_PWR supports up to 2.0A Chapter 2 –...
  • Page 39: Audio I/O Port (Cn9)

    2.4.8 Audio I/O Port (CN9) MIC_L MIC_R GND_AUDIO LINE_L_IN LINE_R_IN GND_AUDIO LEFT_OUT GND_AUDIO RIGHT_OUT +5V_AUDIO Pin Name Signal Type Signal Level MIC_L MIC_R GND_AUDIO LINE_L_IN LINE_R_IN GND_AUDIO LEFT_OUT GND_AUDIO RIGHT_OUT +5V_AUDIO Note: Maximum current rating of Pin 10/ +5V is 1.0A. Chapter 2 –...
  • Page 40: Mini-Card Slot (Half Mini-Card) (Cn10)

    2.4.9 Mini-Card Slot (Half Mini-Card) (CN10) Pin Name Signal Type Signal Level PCIE_WAKE# +3.3VSB/+3.3V +3.3V +1.5V +1.5V PCIE_CLK_REQ# PCIE_REF_CLK- DIFF PCIE_REF_CLK+ DIFF Chapter 2 – Hardware Information...
  • Page 41 Pin Name Signal Type Signal Level W_DISABLE# +3.3V PCIE_RST# +3.3V PCIE_RX-/mSATARX+ DIFF +3.3VSB/+3.3V +3.3V PCIE_RX+/mSATARX- DIFF +1.5V +1.5V SMB_CLK +3.3V PCIE_TX-/mSATATX- DIFF SMB_DATA +3.3V PCIE_TX+/mSATATX+ DIFF USB_D- DIFF USB_D+ DIFF +3.3VSB/+3.3V +3.3V +3.3VSB/+3.3V +3.3V Chapter 2 – Hardware Information...
  • Page 42 Pin Name Signal Type Signal Level +1.5V +1.5V +3.3VSB/+3.3V +3.3V Note 1: CN10 can be set for Mini Card or mSATA by through BOM Option. Note 2: You can choose the function either from mSATA or from CFast on the motherboard.
  • Page 43: Lpc Port (Cn11)

    2.4.10 LPC Port (CN11) Pin Name Signal Type Signal Level LAD0 +3.3V LAD1 +3.3V LAD2 +3.3V LAD3 +3.3V +3.3V +3.3V LFRAME# LRESET# +3.3V LCLK SERIRQ +3.3V Chapter 2 – Hardware Information...
  • Page 44: Com Port 2 (Cn12)

    2.4.11 COM Port 2 (CN12) Note 1: COM2 RS-232/422/485 can be set by BIOS setting. Default is RS-232. Note 2: Pin 8 function can be set by JP9. Note 3: The maximum current rating of Pin 8 is 1.0A RS-232 Pin Name Signal Type Signal Level...
  • Page 45 RS-422 Pin Name Signal Type Signal Level RS422_TX- ±5V RS422_TX+ ±5V RS422_RX+ RS422_RX- NC/+5V/+12V +5V/+12V Chapter 2 – Hardware Information...
  • Page 46 RS-485 Pin Name Signal Type Signal Level RS485_D- ±5V RS485_D+ ±5V NC/+5V/+12V +5V/+12V Chapter 2 – Hardware Information...
  • Page 47: Com Port 3 (Cn14)

    2.4.12 COM Port 3 (CN14) Note 1: COM3 RS-232/422/485 can be set by BIOS setting. Default is RS-232. Note 2: Pin 8 function can be set by JP8. Note 3: Maximum current rating of Pin 8 is 1.0A RS-232 Pin Name Signal Type Signal Level ±5V...
  • Page 48 RS-422 Pin Name Signal Type Signal Level RS422_TX- ±5V RS422_TX+ ±5V RS422_RX+ RS422_RX- NC/+5V/+12V +5V/+12V Chapter 2 – Hardware Information...
  • Page 49 RS-485 Pin Name Signal Type Signal Level RS485_D- ±5V RS485_D+ ±5V NC/+5V/+12V +5V/+12V Chapter 2 – Hardware Information...
  • Page 50: Com Port 4 (Cn15)

    2.4.13 COM Port 4 (CN15) Pin Name Signal Type Signal Level ±9V ±9V ±9V Chapter 2 – Hardware Information...
  • Page 51: Digital I/O Port (Cn16)

    2.4.14 Digital I/O Port (CN16) DIO0 DIO1 DIO2 DIO3 DIO4 DIO5 DIO6 DIO7 Pin Name Signal Type Signal Level DIO0 DIO1 DIO2 DIO3 DIO4 DIO5 DIO6 DIO7 Note: Maximum current rating of Pin 9/+5V is 1.0A. Chapter 2 – Hardware Information...
  • Page 52: Usb 2.0 Port 3 (Cn17)

    2.4.15 USB 2.0 Port 3 (CN17) G N D G N D U S B 3_D + U S B 3_D - + 5V S B Pin Name Signal Type Signal Level +5VSB USB3_D- DIFF USB3_D+ DIFF Note: Maximum current rating of Pin 1/+5V is 0.5A 2.4.16 USB 2.0 Port 2 (CN18) Pin Name...
  • Page 53: Bios Debug Port (Cn19)

    2.4.17 BIOS Debug Port (CN19) Pin Name Signal Type Signal Level +3.3VSB +3.3V SPI_CS SPI_CLK SPI_MISO SPI_MOSI Chapter 2 – Hardware Information...
  • Page 54: Ps/2 Keyboard/Mouse Combo Port (Cn22)

    2.4.18 PS/2 Keyboard/Mouse Combo Port (CN22) Pin Name Signal Type Signal Level KB_ DATA KB_CLK +5VSB MS_DATA MS_CLK Note: Maximum current rating of Pin 4/+5V is 0.5A 2.4.19 Touchscreen Connector (CN23) 4-Wire Touch Pin Name Signal Type Signal Level BOTTOM Chapter 2 –...
  • Page 55 Pin Name Signal Type Signal Level LEFT RIGHT 4 Wires 5 Wires 5-Wire Touch UL(Y) BOTTOM UR(H) LEFT LL(L) RIGHT LR(X) SENSE(S) Pin Name Signal Type Signal Level UL(Y) UR(H) LL(L) LR(X) SENSE(S) Chapter 2 – Hardware Information...
  • Page 56 8-Wire Touch Pin Name Signal Type Signal Level TOP EXCITE BOTTOM EXCITE LEFT EXCITE RIGHT EXCITE TOP SENSE BOTTOM SENSE LEFT SENSE RIGHT SENSE Note: Touch mode can be set by JP20 Chapter 2 – Hardware Information...
  • Page 57: Cpu Fan (Optional) (Cn24)

    2.4.20 CPU FAN (Optional) (CN24) FAN_TAC FAN_POWER Pin Name Signal Type Signal Level FAN_POWER +12V FAN_TAC Note: Maximum current rating of Pin 2/FAN_POWER is 1.0A 2.4.21 USB Ports 0 and 1 (CN25) Pin Name Signal Type Signal Level +5VSB USB0_D- DIFF USB0_D+ DIFF...
  • Page 58: Lan (Rj-45) Port2 (Cn26)

    Pin Name Signal Type Signal Level +5VSB USB1_D- DIFF USB1_D+ DIFF Note 1: Only Port0 supports USB3.2 Gen 1. Note 2: Maximum current rating of USB3.2 GEN1/+5V is 0.9A. Maximum current rating of USB2.0/+5V is 0.5A. 2.4.22 LAN (RJ-45) Port2 (CN26) ACT/LINK SPEED Pin Name...
  • Page 59: Lan (Rj-45) Port1 (Cn27)

    Pin Name Signal Type Signal Level MDI3+ DIFF MDI3- DIFF 2.4.23 LAN (RJ-45) Port1 (CN27) Pin Name Signal Type Signal Level MDI0+ DIFF MDI0- DIFF MDI1+ DIFF MDI2+ DIFF MDI2- DIFF MDI1- DIFF MDI3+ DIFF MDI3- DIFF Chapter 2 – Hardware Information...
  • Page 60: Com Port 1 (D-Sub 9) (Cn28)

    2.4.24 COM Port 1 (D-SUB 9) (CN28) Pin Name Signal Type Signal Level ±9V ±9V ±9V Note: COM Port 1 can be optioned for D-SUB9 or Wafer Box connector (CN20). 2.4.25 HDMI Port (CN29) Pin Name Signal Type Signal Level TMDS_DAT2+ DIFF TMDS_DAT2-...
  • Page 61: Vga Port (Cn30)

    Pin Name Signal Type Signal Level TMDS_DAT1+ DIFF TMDS_DAT1- DIFF TMDS_DAT0+ DIFF TMDS_DAT0- DIFF TMDS_CLK+ DIFF TMDS_CLK- DIFF DDC_CLK DDC_DATA HPLG_DETECT 2.4.26 VGA Port (CN30) Pin Name Signal Type Signal Level GREEN BLUE Chapter 2 – Hardware Information...
  • Page 62: Battery (Cn31)

    Pin Name Signal Type Signal Level RED_GND_RTN GREEN_GND_RTN BLUE_GND_RTN CRT_PLUG# DDC_DATA HSYNC VSYNC DDC_CLK 2.4.27 Battery (CN31) Pin Name Signal Type Signal Level +3.3V +3.3V Chapter 2 – Hardware Information...
  • Page 63: Cfast Slot (Cn33)

    2.4.28 CFast Slot (CN33) Pin Name Signal Type Signal Level SATA_TX+ DIFF SATA_TX- DIFF SATA_RX- DIFF SATA_RX+ DIFF PC10 PC11 PC12 PC13 +3.3V +3.3V PC14 +3.3V +3.3V PC15 PC16 PC17 Chapter 2 – Hardware Information...
  • Page 64: Ddr3L So-Dimm Slot (Cn34)

    2.4.29 DDR3L SO-DIMM Slot (CN34) Standard Specifications 2.4.30 UIM Card Socket (CN35) Pin Name Signal Type Signal Level UIM_PWR UIM_RST UIM_CLK UIM_VPP UIM_DATA 2.4.31 Mini-Card Slot (Full Mini-Card) (CN37) Pin Name Signal Type Signal Level PCIE_WAKE# +3.3VSB +3.3V Chapter 2 – Hardware Information...
  • Page 65 Pin Name Signal Type Signal Level +1.5V +1.5V PCIE_CLK_REQ# UIM_PWR UIM_DATA PCIE_REF_CLK- DIFF UIM_CLK PCIE_REF_CLK+ DIFF UIM_RST UIM_VPP W_DISABLE# +3.3V PCIE_RST# +3.3V PCIE_RX- DIFF +3.3VSB +3.3V PCIE_RX+ DIFF +1.5V +1.5V SMB_CLK +3.3V Chapter 2 – Hardware Information...
  • Page 66 Pin Name Signal Type Signal Level PCIE_TX- DIFF SMB_DATA +3.3V PCIE_TX+ DIFF USB_D- DIFF USB_D+ DIFF +3.3VSB +3.3V +3.3VSB +3.3V +1.5V +1.5V +3.3VSB +3.3V Chapter 2 – Hardware Information...
  • Page 67: Chapter 3 - Ami Bios Setup

    Chapter 3 Chapter 3 - AMI BIOS Setup...
  • Page 68: System Test And Initialization

    System Test and Initialization The system uses certain routines to perform testing and initialization during the boot up sequence. If an error, fatal or non-fatal, is encountered, the system will output a few short beeps or an error message. The board can usually continue the boot up sequence with non-fatal errors.
  • Page 69: Ami Bios Setup

    AMI BIOS Setup The AMI BIOS ROM has a pre-installed Setup program that allows users to modify basic system configurations, which is stored in the battery-backed CMOS RAM and BIOS NVRAM so that the information is retained when the power is turned off. To enter BIOS Setup, press <Del>...
  • Page 70: Setup Submenu: Main

    Setup Submenu: Main Chapter 3 – AMI BIOS Setup...
  • Page 71: Setup Submenu: Advanced

    Setup Submenu: Advanced Chapter 3 – AMI BIOS Setup...
  • Page 72: Power Management

    3.4.1 Power Management Options Summary Power Mode ATX Type Optimal Default, Failsafe Default AT Type Select power supply mode Restore AC Power Last State Optimal Default, Failsafe Default Loss Power On Power Off Select AC power state when power is re-applied after a power failure ERP Function Disabled Optimal Default, Failsafe Default...
  • Page 73 Options Summary Enable Hibernation Disabled Optimal Default, Failsafe Default Enable Enables or Disables System ability to Hibernate (OS/S4 Sleep State). This option may be not effective with some OS ACPI Sleep State Suspend Disabled S3 (Suspend to RAM) Optimal Default, Failsafe Default Select the highest ACPI sleep state the system will enter when the SUSOEND button is pressed.
  • Page 74: S5 Rtc Wake Settings

    3.4.1.1 S5 RTC Wake Settings Options Summary Wake system with Enable Fixed Time Disable Optimal Default, Failsafe Default Wake up day Wake up hour Wake up minute Wake up second Enable or disable System wake on alarm event. When enabled, System will wake on the hr::min::sec specified Wake system with Enable...
  • Page 75: Super Io Configuration

    3.4.2 Super IO Configuration Options Summary Smart Fan Function Enabled Optimal Default, Failsafe Default Disabled Enable or Disable Smart Fan FAN1 Output Mode Output PWM mode (open drain) Linear Fan Application Optimal Default, Failsafe Default Output PWM mode (push pull) Output PWM mode (push pull) to control 4-wire fans.
  • Page 76: Serial Port 1 Configuration

    3.4.2.1 Serial Port 1 Configuration Options Summary Serial Port Disabled Enabled Optimal Default, Failsafe Default Enable or Disable Serial Port (COM) Change Settings Auto Optimal Default, Failsafe Default IO=3F8h; IRQ=4; IO=3F8h; IRQ=3,4,5,7,9,10,11,12; IO=2F8h; IRQ=3,4,5,7,9,10,11,12; IO=3E8h; IRQ=3,4,5,7,9,10,11,12; IO=2F8h; IRQ=3,4,5,7,9,10,11,12; Select an optimal setting for Super IO Device Chapter 3 –...
  • Page 77: Serial Port 2 Configuration

    3.4.2.2 Serial Port 2 Configuration Options Summary Serial Port Disabled Enabled Optimal Default, Failsafe Default Enable or Disable Serial Port (COM) Change Settings Auto Optimal Default, Failsafe Default IO=2F8h; IRQ=3; IO=3F8h; IRQ=3,4,5,7,9,10,11,12; IO=2F8h; IRQ=3,4,5,7,9,10,11,12; IO=3E8h; IRQ=3,4,5,7,9,10,11,12; IO=2F8h; IRQ=3,4,5,7,9,10,11,12; Select an optimal setting for Super IO Device Working model RS422 RS232...
  • Page 78: Serial Port 3 Configuration

    3.4.2.3 Serial Port 3 Configuration Options Summary Serial Port Disabled Enabled Optimal Default, Failsafe Default Enable or Disable Serial Port (COM) Change Settings Auto Optimal Default, Failsafe Default IO=3E8h; IRQ=10; IO=3E8h; IRQ=3,4,5,7,9,10,11,12; IO=2E8h; IRQ=3,4,5,7,9,10,11,12; IO=2D0h; IRQ=3,4,5,7,9,10,11,12; IO=2D8h; IRQ=3,4,5,7,9,10,11,12; Select an optimal setting for Super IO Device Working model RS422 RS232...
  • Page 79: Serial Port 4 Configuration

    3.4.2.4 Serial Port 4 Configuration Options Summary Serial Port Disabled Enabled Optimal Default, Failsafe Default Enable or Disable Serial Port (COM) Change Settings Auto Optimal Default, Failsafe Default IO=2E8h; IRQ=10; IO=3E8h; IRQ=3,4,5,7,9,10,11,12; IO=2E8h; IRQ=3,4,5,7,9,10,11,12; IO=2D0h; IRQ=3,4,5,7,9,10,11,12; IO=2D8h; IRQ=3,4,5,7,9,10,11,12; Select an optimal setting for Super IO Device Chapter 3 –...
  • Page 80: Smart Fan Mod Configuration

    3.4.2.5 Smart Fan Mod Configuration Manual Duty Mode Options Summary Fan 1 Smart Fan Manual Duty Mode Optimal Default, Failsafe Default Control Auto Duty-Cycle Mode Smart Fan Mode Select Manual Duty Optimal Default, Failsafe Default Mode Manual mode fan control, user can write expected duty cycle (PWM fan type) 1-100 Chapter 3 –...
  • Page 81 Auto Duty-Cycle Mode Options Summary Temperature 1 Temperature 2 Temperature 3 The values shown in this table are Temperature 4 the Optimal Default, Failsafe Duty Cycle 1 Default settings for each field. Duty Cycle 2 Duty Cycle 3 Duty Cycle 4 Auto fan speed control.
  • Page 82: Digital Io

    3.4.3 Digital IO Options Summary Type Output Optimal Default, Failsafe Default Input Help for Digital IO Level Optimal Default, Failsafe Default High Help for Digital IO Chapter 3 – AMI BIOS Setup...
  • Page 83: Hardware Monitor

    3.4.4 Hardware Monitor Chapter 3 – AMI BIOS Setup...
  • Page 84: Cpu Configuration

    3.4.5 CPU Configuration Options Summary Intel Virtualization Disabled Technology Enabled Optimal Default, Failsafe Default When enabled, a VMM can utilize the additional hardware capabilities provided by Vanderpool Technology Chapter 3 – AMI BIOS Setup...
  • Page 85: Socket 0 Cpu Information

    3.4.5.1 Socket 0 CPU Information Chapter 3 – AMI BIOS Setup...
  • Page 86: Ide Configuration

    3.4.6 IDE Configuration Options Summary Serial-ATA (SATA) Enabled Optimal Default, Failsafe Default Disabled Enable / Disable Serial ATA SATA Speed Support Gen1 Gen2 Optimal Default, Failsafe Default SATA Speed Support Gen1 or Gen2 SATA Mode IDE Mode AHCI Mode Optimal Default, Failsafe Default Enable/ Disable SATA Port IDE: Configure SATA controllers as legacy IDE AHCI: Configure SATA controllers to operate in AHCI mode...
  • Page 87 Options Summary SATA Port0 HotPlug Enabled Disabled Optimal Default, Failsafe Default Enable / Disable SATA Port0 HotPlug Serial-ATA Port 1 Enabled Optimal Default, Failsafe Default Disabled Enable / Disable Serial ATA Port 1 SATA Port1 HotPlug Enabled Disabled Optimal Default, Failsafe Default Enable / Disable SATA Port1 HotPlug Chapter 3 –...
  • Page 88: Csm Configuration

    3.4.7 CSM Configuration Options Summary CSM Support Disabled Enabled Optimal Default, Failsafe Default Enable/ Disable CSM Support Boot option filter UEFI and Legacy Optimal Default, Failsafe Default Legacy only UEFI only This option controls Legacy/ UEFI ROMs priority Storage Do not launch UEFI Legacy Optimal Default, Failsafe Default...
  • Page 89 Options Summary Other PCI devices UEFI Optimal Default, Failsafe Default Legacy Determines OpROM execution policy for devices other than Network, Storage or Video Chapter 3 – AMI BIOS Setup...
  • Page 90: Trusted Computing

    3.4.8 Trusted Computing Options Summary Security Device Disabled Optimal Default, Failsafe Default Support Enabled Enables or Disables BIOS support for security device. O.S. will not show Security Device. TCG EFI protocol and INT1A interface will not be available. Chapter 3 – AMI BIOS Setup...
  • Page 91: Usb Configuration

    3.4.9 USB Configuration Options Summary Legacy USB Support Enabled Optimal Default, Failsafe Default Disabled Auto Enables Legacy USB support. AUTO option disables legacy support if no USB devices are connected. DISABLE option will keep USB devices available only for EFI applications. USB Mass Storage Disabled Driver Support...
  • Page 92: Touch Device

    3.4.10 Touch Device Options Summary Touch Device Enable Optimal Default, Failsafe Default Disable Help for Touch Device Chapter 3 – AMI BIOS Setup...
  • Page 93: Setup Submenu: Chipset

    Setup Submenu: Chipset Chapter 3 – AMI BIOS Setup...
  • Page 94: North Bridge

    3.5.1 North Bridge Options Summary Primary Boot Display VBIOS Default Optimal Default, Failsafe Default HDMI LVDS Select the Video Device which will be activated during POST. This has no effect if external graphics present. Secondary boot display selection will appear based on your selection. VGA modes will be supported only on primary display Chapter 3 –...
  • Page 95: Lvds Panel Configuration

    3.5.1.1 LVDS Panel Configuration Options Summary LVDS Disabled Enabled Optimal Default, Failsafe Default Enable/ Disabled this panel Panel Type 640x480 800x480 800x600 1024x600 1024x768 Optimal Default, Failsafe Default 1280x768 1280x800 1280x1024 1366x768 1440x900 1600x1200 1920x1080 1920x1200 Select Panel Type Chapter 3 – AMI BIOS Setup...
  • Page 96 Options Summary Color Depth 18-Bit Optimal Default, Failsafe Default 24-Bit 36-Bit 48-Bit Select Color Depth Backlight Type Normal Optimal Default, Failsafe Default Inverted Select backlight control signal type Backlight Level Optimal Default, Failsafe Default 100% Select backlight control level Backlight PWM Freq 100Hz 200Hz 220Hz...
  • Page 97 Options Summary Center Spreading no spreading Optimal Default, Failsafe Default Depth 0.5% 1.0% 1.5% 2.0% 2.5% Select Center Spreading Depth Chapter 3 – AMI BIOS Setup...
  • Page 98: South Bridge

    3.5.2 South Bridge Chapter 3 – AMI BIOS Setup...
  • Page 99: Azalia Hd Audio

    3.5.2.1 Azalia HD Audio Options Summary Audio Controller Disabled Enabled Optimal Default, Failsafe Default Control Detection of the Azalia device. Disabled = Azalia will be unconditionally disabled. Enable = Azalia will be unconditionally Enabled. Azalia HDMI Codec Disabled Enabled Optimal Default, Failsafe Default Enable/Disable internal HDMI Codec for Azalia HDMI Port Disabled...
  • Page 100: Usb Configuration

    3.5.2.2 USB Configuration Options Summary XHCI Mode Enabled Disabled Auto Optimal Default, Failsafe Default Smart Auto Mode of operation of xHCI controller USB Per Port Control Enabled Optimal Default, Failsafe Default Disabled Control each of the USB ports (0~3). Enable: Enable USB per port; Disable: Use USB Port X settings USB Port X Disabled...
  • Page 101: Pci Express Configuration

    3.5.2.3 PCI Express Configuration Options Summary PCI Express Root Port X Enabled Optimal Default, Failsafe Default Disabled Enable or Disable the PCI Express Port X in the Chipset. Hot Plug Disabled Enabled Optimal Default, Failsafe Default Enable or disable PCI Express Hot Plug. Speed Auto Optimal Default, Failsafe Default...
  • Page 102: Setup Submenu: Security

    Setup Submenu: Security Change User/Administrator Password You can set an Administrator Password or User Password. An Administrator Password must be set before you can set a User Password. The password will be required during boot up, or when the user enters the Setup utility. A User Password does not provide access to many of the features in the Setup utility.
  • Page 103: Setup Submenu: Boot

    Setup Submenu: Boot Options Summary Launch i210/i211 PXE Disabled Default OpROM Enabled Launch PXE Option Rom Quiet Boot Disabled Enabled Default Enables or disables Quiet Boot option Chapter 3 – AMI BIOS Setup...
  • Page 104: Setup Submenu: Save & Exit

    Setup Submenu: Save & Exit Chapter 3 – AMI BIOS Setup...
  • Page 105: Chapter 4 - Drivers Installation

    Chapter 4 Chapter 4 – Drivers Installation...
  • Page 106: Driver Download/Installation

    Driver Download/Installation Drivers for the GENE-BT05 can be downloaded from the product page on the AAEON website by following this link: https://www.aaeon.com/en/p/3-and-half-inches-subcompact-boards-gene-bt05 Download the driver(s) you need and follow the steps below to install them. Step 1 – Install Chipset Drivers Open the Step1 - Chipset folder and select your OS Open the .exe file in the folder Follow the instructions...
  • Page 107 Step 4 – Install Audio Driver (Windows 8 only) Open the Step4 - Audio folder and select your OS Open the .exe file in the folder Follow the instructions Drivers will be installed automatically Step 5 – Install TXE Drivers Open the Step5 - TXE folder select your OS Open the .exe file in the folder Follow the instructions...
  • Page 108 Step 8 – Install MBI Driver Open the Step8 - MBI folder and select your OS Open the Setup.exe file in the folder Follow the instructions Drivers will be installed automatically Step 9 – Install USB 3.0 Driver (Windows 7 only) Open the Step9 - USB3.0 folder followed by the Setup.exe file Follow the instructions Drivers will be installed automatically...
  • Page 109 Reboot and log in as administrator Run patch.bat as administrator Chapter 4 – Driver Installation...
  • Page 110 For Windows 8/ Windows 10: Open the Apps Screen, right click on the Command Prompt tile and select Run as Administrator Chapter 4 – Driver Installation...
  • Page 111 To install the driver (patch.bat), you will first have to locate the file in command prompt. To do that, first go to the directory which contains the file by entering <drive letter>: eg. if the driver is in D drive, enter D: You are now at the directory containing the installation file.
  • Page 112 To confirm the installation, go to Device Manager, expand the Ports (COM & LPT) tree and double click on any of the COM ports to open its properties. Go to the Driver tab, select Driver Details and click on serial.sys, you should see its provider as Windows (R) Win 7 DDK Provider.
  • Page 113: Appendix A - Watchdog Timer Programming

    Appendix A Appendix A - Watchdog Timer Programming...
  • Page 114: Watchdog Timer Registers

    Watchdog Timer Registers Table 1 : Watch dog relative IO address I/O Base Default Value Note Address 0xA00 I/O Base address for Watchdog operation. This address is assigned by SIO LDN7, register 0x60‐0x61. Table 2 : Watchdog relative register table Register Offset BitNum...
  • Page 115: A.2 Watchdog Sample Program

    A.2 Watchdog Sample Program *********************************************************************// WDT I/O operation relative definition (Please reference to Table 1) #define WDTAddr 0xA00 // WDT I/O base address Void WDTWriteByte(byte Register, byte Value); byte WDTReadByte(byte Register); Void WDTSetReg(byte Register, byte Bit, byte Val); // Watch Dog relative definition (Please reference to Table 2) #define DevReg 0x00 // Device configuration register #define WDTRstBit 0x80 // Watchdog WDTRST# (Bit7) #define WDTRstVal 0x80 // Enabled WDTRST#...
  • Page 116 ********************************************************************* VOID Main(){ // Procedure : AaeonWDTConfig // (byte)Timer : Counter of WDT timer.(0x00~0xFF) // (boolean)Unit : Select time unit(0: second, 1: minute). AaeonWDTConfig(Counter, Unit); // Procedure : AaeonWDTEnable // This procudure will enable the WDT counting. WDTSetBit(TimerReg, PSWidthBit, PSWidthVal); // Watchdog WDTRST# Enable WDTSetBit(DevReg, WDTRstBit, WDTRstVal);...
  • Page 117 ********************************************************************* VOID WDTWriteByte(byte Register, byte Value){ IOWriteByte(WDTAddr+Register, Value); byte WDTReadByte(byte Register){ return IOReadByte(WDTAddr+Register); VOID WDTSetBit(byte Register, byte Bit, byte Val){ byte TmpValue; TmpValue = WDTReadByte(Register); TmpValue &= ~(1 << Bit); TmpValue |= Val << Bit; WDTWriteByte(Register, TmpValue); ********************************************************************* Appendix A – Watchdog Timer Programming...
  • Page 118: Appendix B - I/O Information

    Appendix B Appendix B - I/O Information...
  • Page 119: I/O Address Map

    I/O Address Map Appendix B – I/O Information...
  • Page 120: Memory Address Map

    Memory Address Map Appendix B – I/O Information...
  • Page 121: Irq Mapping Chart

    IRQ Mapping Chart Appendix B – I/O Information...
  • Page 122 Appendix B – I/O Information...
  • Page 123 Appendix B – I/O Information...
  • Page 124: Dma Channel Assignments

    DMA Channel Assignments Appendix B – I/O Information...
  • Page 125: Appendix C - Mating Connectors

    Appendix C Appendix C – Mating Connectors...
  • Page 126: List Of Mating Connectors And Cables

    List of Mating Connectors and Cables Mating Connector Connector Available Function Cable P/N Label Cable Vendor Model no External AUX Power and PHR-6 PS_ON# LVDS Inverter PHR-5 Connector 2 Pins +5Vout For SATA PHR-2 1702150155 Connector Power External +5VSB Power XHP-3 170220020B Input and...
  • Page 127 Mating Connector Connector Available Function Cable P/N Label Cable Vendor Model no Digital IO CN16 Molex 51110-1050 Connector USB Port #3 CN17 Molex 51021-0500 1700050207 Connector Cable USB Port #2 CN18 Molex 51021-0500 1700050207 Connector Cable PS/2 PS/2 KB/MS CN22 PHDR-06VS KB/MS 1700060152...
  • Page 128: Appendix D - Electrical Specifications For I/O Ports

    Appendix D Appendix D – Electrical Specifications for I/O Ports...
  • Page 129: Electrical Specifications For I/O Ports

    Electrical Specifications for I/O Ports Voltage/Current Reference Signal Name Output LVDS Port Inverter / +5V/+12V +5V/1.5A or +12V/1.5A Backlight Connector +5V Output for SATA HDD +5V/1A LVDS Port +3.3V/+5V +3.3V/2A or +5V/2A Audio I/O Port +5V/1A Mini-Card Slot (Half-Mini +3.3VSB +3.3V/1.1A CN10 Card)

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