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IC Block Diagrams
● I / P Converter (IC501: SDA9415)
HINM
ISCM
VINM
Input sync controller Master
SYNCENM
clock
doubling
CLKM
PLLM
Line memory
IFCM
YINM
Input
format
compression
UVINM
conversion
IFCM
YINS
Input
format
compression
UVINS
conversion
Line memory
clock
doubling
CLKM
PLLS
HINS
ISCS
VINS
Input sync controller Slave
SYNCENS
● RGB Matrix (IC601: MN82860)
AnalogG/Y
AD
AnalogB/U
AD
AnalogR/V
AD
DiditalG/Y
DiditalB/U
DiditalR/V
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TEST RESET
LBD
Letter
box
detection
LM
TSNR
VHCOMM
ED
Temporal,
Vertical and
DRAM
Horizontal
spetial
+
noise
Buffer
expansion
reduction
+
Voltage
control
VHCOMM
Vertical and
+
Horizontal
Test-
controller
expansion
LM
MC
Memory
Controller
Black/White
Expander
White
Character
Collection
Color
Adjustment
De-Modulation
Axis
Adjustment
De-Modulation
Gain
Adjustment
X1CLKD
X2
clock
doubling
VM
PLLD
Vector
Memory
OSCM/S
Output sync
controller
ME
Master
motion
estimation
LM
SRAM
Line
Scan rate
Memory
conversion
Master
M
DLTI
U
DCTI
Vertical
Peaking
X
Framiong
expansion
Delay
SRCS
OSD Data Input
2
I
I/F
2
I
C Bus
-30-
CLKOUT
INTERLACED
HOUT
VOUT
BLNK
OFC
DAC
YO
4:4:4
3:3:3
DAC
UO
VO
DAC
YOUT
UVOUT
PC
SDA
SCL
C Bus
Clock Input
R
G
B
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