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SCHEMATIC DIAGRAM-1
A
MAIN 1/5 CIRCUIT
IORST
A(0-25)
D(0-31)
+3.3D
b
FDC.TC
c
R4
Q1
PMUT
4.7K
R7
2SB0709ARL
d
100K
USB.SD
e
USB.ST
Q2
f
USB.MAITU
g
2SD0601AQL
MIDI.TX
R3
C3
h
0.22
MIDI.RX
1K
i
RMCOM
R8
j
R6
CP.CLK
4.7K
k
1K
CP.DATA
D3
SD.CS
D1
R1
MA2J11100L
MA2J11100L
100
REAL.SDA
+3.3D
+3.3D
Z8 4.7Kx4
Z15 4.7Kx4
A(0)
8
4
A(16)
8
4
A(1)
7
3
A(17)
7
3
A(2)
6
2
A(18)
6
2
A(3)
5
1
A(19)
5
1
A(4)
8
4
A(20)
8
4
A(5)
7
3
A(21)
7
3
A(6)
6
2
A(22)
6
2
A(7)
5
1
A(23)
5
1
Z17 4.7Kx4
Z9 4.7Kx4
Z11 4.7Kx4
A(8)
8
4
A(9)
7
3
A(10)
6
2
A(11)
5
1
A(12)
8
4
A(13)
7
3
A(14)
6
2
A(15)
5
1
Z12 4.7Kx4
+3.3D
C2
0.1
16
VCC
A(16)
7
7
A0
1
A(17)
PSRT.EX3
9
6
A1
2
A(18)
TGCS
10
5
A2
3
TGCS2
11
4
Y
CS2
4
12
3
CS3
5
13
2
CS1
6
14
1
IC1
PORT.EX2
15
0
GND
C0JBAN000098
8
LCD.CS
SNS
TBC.SNS
TGS.INT1
USB.SOF
FOC.DRQ
IRQ0
SDC0
a
BUSCLK
b
LCD.WAIT
c
RE
d
WE3
e
WE2
R12
4.7K
R2
C1
100
100P
A(0)
1
A0
A(1)
2
A1
A(2)
3
A2
A(3)
4
A3
5
VSS
A(4)
6
A4
A(5)
7
A5
A(6)
8
A6
A(7)
IC2
9
A7
MN103002A
C4
0.1
10
VDD
(32bit MICRO-CONTROLLER)
A(8)
11
A8
A(9)
12
A9
A(10)
13
A10
A(11)
14
A11
15
VSS
A(12)
16
A12
A(13)
17
A13
A(14)
18
A14
A(15)
19
A15
C5
0.1
20
VDD
A(16)
21
A16
A(17)
22
A17
A(18)
23
A18
A(19)
24
A19
25
VSS
A(20)
26
A20
A(21)
27
A21
A(22)
28
A22
A(23)
29
A23
C6
0.1
30
VDD
A(24)
31
A24
A(25)
32
A25
33
A26/CS4/RAS4
34
A27/CS5
35
VSS
36
A28/CS6
37
A29
38
A30
39
A31/CS7
40
VDD
+3.3D
5
4
D2
6
3
MA2J11100L
7
2
8
1
Z4 4.7K
R9
4.7K
R11
4.7K
C8
0.1
R5
100K
+3.3D
+3.3D
+3.3D
Z14 4.7Kx4
Z20 4.7Kx4
4
5
D(0)
4
5
D(16)
3
6
D(1)
3
6
D(17)
2
7
D(2)
2
7
D(18)
1
RST
1
8
D(3)
1
8
D(19)
Z16 4.7Kx4
Z21 4.7Kx4
4
5
D(4)
4
5
D(20)
3
6
D(5)
3
6
D(21)
2
7
D(6)
2
7
D(22)
1
8
D(7)
1
8
D(23)
Z18 4.7Kx4
Z22 4.7Kx4
4
5
D(8)
4
5
D(24)
+3.3D
3
6
D(9)
3
6
D(25)
2
7
D(10)
2
7
D(26)
1
8
D(11)
1
8
D(27)
Z19 4.7Kx4
Z23 4.7Kx4
4
5
D(12)
4
5
D(28)
3
6
D(13)
3
6
D(29)
2
7
D(14)
2
7
D(30)
1
8
D(15)
1
8
D(31)
VSS
120
R33
4.7K
DSDSAT
119
R34
4.7K
DSCLK
118
R36
4.7K
MMODE
117
R37
4.7K
BMODE
116
C19
0.1
VDD
115
D(16)
D16
114
D(17)
D17
113
D(18)
D18
112
D(19)
D19
111
VSS
110
D(20)
D20
109
D(21)
D21
108
D(22)
D22
107
D(23)
D23
106
C20 0.1
VDD
105
D(24)
D24
104
D(25)
D25
103
D(26)
D26
102
D(27)
D27
101
VSS
100
D(28)
D28
99
D(29)
D29
98
D(30)
D30
97
D(31)
D31
96
VDD
95
R30
4.7K
DMR0
94
C21 0.1
DMK0
93
R31 4.7K
DMR1
92
DMK1
91
R32 4.7K
DMR2
90
R39
DMK2
89
47
DMR3
88
DMK3
87
VSS
86
SYSCLK
85
DSC1
84
DSC0
83
VREF5V
+5D
82
VDD
81
C22
C17 0.1
0.1
7
R40
VDD
47
1
XIN
SSCLK
5
8
XOUT
S1
3
R35
6
FRSEL
S2
4
47
GND
2
IC6
C0ZBZ0000667
C15
X1
0.1
H0J800400015
C16
C18
3P
3P
Z13
100x4
4
5
3
6
2
7
1
8
R17 0
+3.3D
+3.3D
R27
R38
5
4.7K
5
1
1
33
4
4
2
2
IC3
IC5
R28
3
3
C0JBAD000071
C0JBAE000140
470
+3.3D
+3.3D
C28 0.1
VCC
VCC
GND
GND
IC7
IC9
C0JBAA000255
C0JBAA000117
+3.3D
R42
330
5
1
4
2
IC7
3
C27
C0JBAA000255
220P
IC9
C0JBAA000117
IC9
C0JBAA000117
IC9
C0JBAA000117
IC9
C0JBAA000117
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