Architecture - Huawei CX116 Product White Paper

Huawei CX116 Pass Through Module
White Paper
No.
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1.6 Architecture

This topic describes the CX116 logical architecture.
The CX116 logical architecture includes the processor module, CPLD module, PHY module,
and GE pass through module.
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Figure 1-9 Logical architecture
Front Panel
Issue 05 (2017-03-27)
Name
Air deflector
Captive screw
Ejector lever
GE electrical port
module
Processor module: The processor module, in a dominant frequency of 333 MHz, is the
controlling core for the CX116 and supports master/slave and multi-master modes.
CPLD module: The CPLD module is a key module to help the processors to collect the
CX116 information, and power on, power off, and reset the CX116.
PHY module: The PHY module converts the 32 Serdes signals to 32 x 1000 BASE-T
signals.
Main Board
PWR
HLY
32 x RJ45
16*(2*GE)
Huawei Proprietary and Confidential
Copyright © Huawei Technologies Co., Ltd.
Description
Directs air flows to reduce the CX116 temperature and
achieve optimal heat dissipation of the PHY module.
Secures the CX116.
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Provides 32 x 1000 Base-T Ethernet electric ports (RJ45)
on the CX116. Each port provides a green indicator.
Flash
DDR2
EEPROM
Four PHY modules
CPLD
CPU
16*(2*GE)
1 Overview
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