3.4.7
3.4.8
3.4.8.1
3.4.8.2
3.5
Setup submenu: Chipset ...................................................................................... 52
3.5.1
3.5.1.1
3.5.2
3.6
3.7
Setup submenu: Boot ........................................................................................... 59
3.7.1
BBS Priorities ............................................................................................... 60
3.8
4.1
A.1
B.1
I/O Address Map ................................................................................................... 72
B.2
Memory Address Map ......................................................................................... 73
B.3
IRQ Mapping Chart ............................................................................................... 73
C.1
DIO Programming .................................................................................................. 81
C.2
Digital I/O Register ................................................................................................ 82
C.3
Preface
XII