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D-NF430/NF431
5-3. SCHEMATIC DIAGRAM – MAIN Board (1/4) –
(1/4)
A1
A2
A3
(Page 15)
A4
SD-RAM
MSM56X16160J
VCC
SDDQ1
DQ1
SDDQ2
DQ2
C895
VSSQ
0.1
SDDQ3
DQ3
SDDQ4
DQ4
VCCQ
SDDQ5
DQ5
SDDQ6
DQ6
C897
VSSQ
0.1
SDDQ7
DQ7
SDDQ8
DQ8
VCCQ
SDLDQM
R859
0
LDQM
SDXWE
R855
0
XWE
SDXCAS
R856
22
XCAS
SDXRAS
R860
22
XRAS
SDXCS
R858
0
XCS
SDA11
A11
SDA10
A10
SDA0
A0
SDA1
A1
SDA2
A2
SDA3
A3
VCC
C898
C899
0.1
0.1
AML
XSCK0
SI0
SO0
TU_LATCH
TU_L
TU_R
TU_POWER
(Page
VCC2
TU_GND
17)
A5
A6
A7
A8
A9
(Page 15)
A10
D-NF430/NF431
• See page 20 for Waveforms. • See page 11 for IC Block Diagrams. • See page 20 for IC Pin Function Description.
+2.1V REGULATOR
C603
1
SDUDQM
C830
0.1
SDA3
SDA2
SDA1
C829
0.1
SDA0
IC851
SDA10
-20T3
SDA11
SDXCS
VSS
SDDQ16
SDXRAS
DQ16
SDDQ15
SDXCAS
DQ15
C892
SDXWE
VSSQ
0.1
SDDQ14
SDLDQM
DQ14
SDDQ13
DQ13
C832
0.1
VCCQ
SDDQ12
SDDQ8
DQ12
SDDQ11
SDDQ7
DQ11
C893
SDDQ6
VSSQ
0.1
SDDQ10
SDDQ5
DQ10
SDDQ9
SDDQ4
DQ9
SDDQ3
VCCQ
SDDQ2
NC
R865
0
SDUDQM
SDDQ1
UDQM
R866
22
SDCLK
C838
CLK
0.1
R867
22
SDCKE
SDDQ16
CKE
SDDQ15
NC
SDA9
SDDQ14
A9
SDA8
SDDQ13
A8
SDA7
SDDQ12
A7
SDA6
SDDQ11
A6
SDA5
A5
C833
SDA4
0.1
A4
SDDQ10
VSS
SDDQ09
FB805
C891
22
AML
6.3V
XSCK0
SI0
SO0
TU_LATCH
TU_L
TU_R
TU_POWER
IC603
XC6213B212NR
R604
C607
C601
1M
0.47
4700p
CE
R602
VIN
0
R634
VSS
R601
R614
0
VOUT
10k
220k
R613
C611
220k
1
C602
R616
0.1
R618
0
47k
R606
C862
2.2k
0.1
R610
R607
100k
2.2k
C831
R617
0.1
22k
R644
0
SDUDQM
VDIOSD
VSS
SDA3
SDA2
SDA1
DVDD
SDA0
SDA10
SDA11
SDNCS
SDNRAS
SDNCAS
SDNWE
SDLDQM
VSS
VDIOSD
SYSTEM CONTROLLER,DSP,LCD DRIVER
IC801
SDDQ8
CXR721260-203R
SDDQ7
SDDQ6
SDDQ5
SDDQ4
SDDQ3
SDDQ2
SDDQ1
DVDD
SDDQ16
SDDQ15
SDDQ14
SDDQ13
SDDQ12
SDDQ11
VSS
VDIOSD
SDDQ10
SDDQ9
R623
10k
C834
0.1
C803
1000p
R811
R897
1M
1k
C801
4700p
C810
D880
SL805
S801
0.01
MA8051-TX
(OPEN)
OPEN
14
14
CB605
470P
+2.7V REGULATOR
IC841
XC6219B272MR
R461
CE
0
NC
CE
VSS
VOUT
VIN
C849
1
31
D882
RB521S
-30FTE61
C848
1
R869
0
TFDR
TFDR
TRDR
TRDR
C843
C841
VDIOSD2
0.1
0.1
VSS
VDIODSP
FRDL
FFDR
FRDR
OSC_STBY
FRDR
C842
0.1
DVDD
MDP
MDP
SYNC
SYNC
C846
VDIOAMP
0.1
PWML
PWML
PWMR
PWMR
R815
0
VSSAMP
X601
R647
DAMPCLK
22.496MHz
1M
C839
AVDMO
0.1
EXTAL
XTAL
AVSMO
C681
C845 C844
AVDPLL0
0.1
(NF430:US)
0.1
0.1
AVSPLL1
AVDPLL1
TEST 2
VG
TEST 3
R891
R805
EVA
0
0
TESTMODE
ATEST
RTCK
TDO
FG
FG
TU_BEEP
TU_BEEP
POWERLT
POW.LATCH
SI0
SI0
VSS
SO0
SO0
XSCK0
XSCK0
R887
100k
EEPROM
IC802
(NF430:US)
AK6510CL-L
R803
100k
FB800
XCS
VCC
DO
_HOLD
AD_KEY1
_WP
SCK
GND
DI
C875
0.1
R893
L109
100k
47µH
OFF
S802
FB300
HOLD
0
HOLD
C201
1000p
When MAIN board is replaced or EEPROM (IC802) on the MAIN board is
replaced, patch processing is needed.
Confirm about information of patch processing to each service headquarters.
B1
B2
B3
B4
(Page 16)
+2.7V REGULATOR
IC803
XC6219B272MR
C809
2.2
R816
0
C808
0.1
Q701
RT3T67M
CLOCK
SHIFT
R685
100k
−2 −1
R684
470k
D601
R683
C682
HVL375CMKRF
100k
47p
-E
C684
0.1
R681
470k
R682
470k
C683
D602
100p
HVL375CMKRF-E
R686
470k
CLK_SHIFT
R464
0
CN604
10P
XSCKI
FB801
CLK_I
LCD_CS
FB802
LCD_CS_I
SO1
FB803
DATA_O
SI1
FB804
DATA_I
LCD_XRST
LCD_XRST
R465
0
VCC2 2.1V
C805
1000p
VCC3 2.7V
FB800
C807
1000p
D_GND
(Page
AD_KEY1
19)
SGND
NF430:UK
0
/NF431
A11
A12
A13
(Page 15)
B5
B6
B7
(Page 16)
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