Toshiba TXZ Plus Series Reference Manual
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Toshiba TXZ Plus Series Reference Manual

Toshiba TXZ Plus Series Reference Manual

32-bit risc microcontroller
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TXZ+ Family
TMPM4N Group(1)
Input/Output Ports
32-bit RISC Microcontroller
TXZ+ Family
TMPM4N Group(1)
Reference Manual
Input/Output Ports
(PORT-M4N(1))
Revision 1.0
2021-01
2021-01-18
1 / 82
© 2020-2021
Rev. 1.0
Toshiba Electronic Devices & Storage Corporation

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Summary of Contents for Toshiba TXZ Plus Series

  • Page 1 TXZ+ Family TMPM4N Group(1) Input/Output Ports 32-bit RISC Microcontroller TXZ+ Family TMPM4N Group(1) Reference Manual Input/Output Ports (PORT-M4N(1)) Revision 1.0 2021-01 2021-01-18 1 / 82 © 2020-2021 Rev. 1.0 Toshiba Electronic Devices & Storage Corporation...

  • Page 2: Table Of Contents

    TXZ+ Family TMPM4N Group(1) Input/Output Ports Contents Preface ................................. 5 Related document ..............................5 Conventions ................................6 Terms and Abbreviations ............................8 Outlines ................................. 9 Function ..............................11 2.1. Clock supply ..............................11 Signal connection list ..........................12 Registers ..............................33 4.1.
  • Page 3 TXZ+ Family TMPM4N Group(1) Input/Output Ports 5.8. Type FTU10 ..............................76 5.9. Type FTU13 ..............................77 5.10. Type FTU14 ..............................78 5.11. Type FTU15 ..............................79 Precaution ..............................80 6.1. Pin status during the reset period ........................80 6.2. Unused pins ..............................80 6.3.
  • Page 4 TXZ+ Family TMPM4N Group(1) Input/Output Ports List of Tables Table 1.1 Features ............................. 9 Table 3.1 Signal connection list (1/21) ..................... 12 Table 3.2 Signal connection list (2/21) ..................... 13 Table 3.3 Signal connection list (3/21) ..................... 14 Table 3.4 Signal connection list (4/21) ..................... 15 Table 3.5 Signal connection list (5/21) .....................

  • Page 5: Preface

    TXZ+ Family TMPM4N Group(1) Input/Output Ports Preface Related document Document name Product Information Clock Control and Operation Mode Exception Flash Memory 8-bit Digital to Analog Convertor C Interface C Interface Version A S Interface Serial Peripheral Interface Synchronous Serial interface CAN Controller Universal Serial Bus Ethernet Mac...

  • Page 6: Conventions

    TXZ+ Family TMPM4N Group(1) Input/Output Ports Conventions ● Numeric formats follow the rules as shown below: Hexadecimal: 0xABC Decimal: 123 or 0d123 – Only when it needs to be explicitly shown that they are decimal numbers. Binary: 0b111 – It is possible to omit the "0b" when the number of bit can be distinctly understood from a sentence.
  • Page 7 TXZ+ Family TMPM4N Group(1) Input/Output Ports All other company names, product names, and service names mentioned herein may be trademarks of their respective companies. 2021-01-18 7 / 82 Rev. 1.0...

  • Page 8: Terms And Abbreviations

    TXZ+ Family TMPM4N Group(1) Input/Output Ports Terms and Abbreviations Some of abbreviations used in this document are as follows: Controller Area Network Consumer Electronics Control Direct Memory Access Inter-Integrated Circuit Inter-IC Sound JTAG Joint Test Action Group NBDIF Non Break Debug Interface PORF Power On Reset Circuit for FLASH and debug Serial Wire...

  • Page 9: Outlines

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 1. Outlines It is described about the register and setting of port. A list of the functions is indicated below. Table 1.1 Features Function Function Description Classification Programmable pull-up /Programmable pull-down /Open-drain output Port are possible.
  • Page 10 TXZ+ Family TMPM4N Group(1) Input/Output Ports Function Function Description Classification Test select input pin, Serial clock input pin, Serial data output pin, JTAG Serial data input pin, Test reset pin Serial wire data input/output pin, Serial wire clock input pin, Serial wire viewer output pin Debug pins Trace...

  • Page 11: Function

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 2. Function 2.1. Clock supply When PORT is used, the corresponding clock enable bits should be set to "1" (Clock supply) in fsys supply stop register A ([CGFSYSENA] and [CGFSYSMENA]), fsys supply stop register B ([CGFSYSENB] and [CGFSYSMENB]), fsys supply stop register C ([CGFSYSMENC]), and fc supply stop register ([CGFCEN]).

  • Page 12: Signal Connection List

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 3. Signal connection list The function pins are sorted by the signal name of the block diagram which is described in each reference manual in this table. Register setting of the peripheral function is explained in the order of port, so please use for a reverse lookup of port name.

  • Page 13: Table 3.2 Signal Connection List (2/21)

    TXZ+ Family TMPM4N Group(1) Input/Output Ports Table 3.2 Signal connection list (2/21) Function pin Port M4NR M4NQ M4NN M4NR M4NQ Related Reference Manual name name (LQFP176) (LQFP144) (LQFP100) (BGA177) (BGA145) UT3RXD UT3TXDA UT3CTS_N UT3RTS_N UT4RXD Asynchronous Serial UT4TXDA Communication Circuit UT4CTS_N UT4RTS_N UT5RXD...

  • Page 14: Table 3.3 Signal Connection List (3/21)

    TXZ+ Family TMPM4N Group(1) Input/Output Ports Table 3.3 Signal connection list (3/21) Function pin Port M4NR M4NQ M4NN M4NR M4NQ Related Reference Manual name name (LQFP176) (LQFP144) (LQFP100) (BGA177) (BGA145) FUT0RXD FUT0TXD FUT0CTS_N FUT0RTS_N FUT0IROUT FUT0IRIN Full Asynchronous Serial Communication Circuit FUT1RXD FUT1TXD FUT1CTS_N...

  • Page 15: Table 3.4 Signal Connection List (4/21)

    TXZ+ Family TMPM4N Group(1) Input/Output Ports Table 3.4 Signal connection list (4/21) Function pin Port M4NR M4NQ M4NN M4NR M4NQ Related Reference Manual name name (LQFP176) (LQFP144) (LQFP100) (BGA177) (BGA145) ISDAIN0 ISDAIN1 ISDAIN2 ISDAIN3 ISDAOUT ISDBIN0 ISDBIN1 Interval Sensor Detection ISDBIN2 Circuit ISDBIN3...

  • Page 16: Table 3.5 Signal Connection List (5/21)

    TXZ+ Family TMPM4N Group(1) Input/Output Ports Table 3.5 Signal connection list (5/21) Function pin Port M4NR M4NQ M4NN M4NR M4NQ Related Reference Manual name name (LQFP176) (LQFP144) (LQFP100) (BGA177) (BGA145) TSPI3CSIN TSPI3CS0 TSPI3CS1 TSPI3RXD TSPI3TXD TSPI3SCK TSPI4CSIN TSPI4CS0 TSPI4RXD TSPI4TXD TSPI4SCK TSPI5CSIN TSPI5CS0...

  • Page 17: Table 3.6 Signal Connection List (6/21)

    TXZ+ Family TMPM4N Group(1) Input/Output Ports Table 3.6 Signal connection list (6/21) Function pin Port M4NR M4NQ M4NN M4NR M4NQ Related Reference Manual name name (LQFP176) (LQFP144) (LQFP100) (BGA177) (BGA145) TSSI0TCK TSSI0TFS TSSI0TXD TSSI0RCK TSSI0RFS TSSI0RXD Synchronous Serial interface TSSI1TCK TSSI1TFS TSSI1TXD TSSI1RCK...

  • Page 18: Table 3.7 Signal Connection List (7/21)

    TXZ+ Family TMPM4N Group(1) Input/Output Ports Table 3.7 Signal connection list (7/21) Function pin Port M4NR M4NQ M4NN M4NR M4NQ Related Reference Manual name name (LQFP176) (LQFP144) (LQFP100) (BGA177) (BGA145) I2S0MCLK I2S0LRCK I2S0BCK I2S0DO I2S0DI S Interface I2S1MCLK I2S1LRCK I2S1BCK I2S1DO I2S1DI 2021-01-18...

  • Page 19: Table 3.8 Signal Connection List (8/21)

    TXZ+ Family TMPM4N Group(1) Input/Output Ports Table 3.8 Signal connection list (8/21) Function pin Port M4NR M4NQ M4NN M4NR M4NQ Related Reference Manual name name (LQFP176) (LQFP144) (LQFP100) (BGA177) (BGA145) CANARX CANATX CAN Controller CANBRX CANBTX USBA_SOF_TGL USBA_ID USBA_VBUSEN USBA_DP USBA_DM USBA_VBUS Universal Serial Bus...

  • Page 20: Table 3.9 Signal Connection List (9/21)

    TXZ+ Family TMPM4N Group(1) Input/Output Ports Table 3.9 Signal connection list (9/21) Function pin Port M4NR M4NQ M4NN M4NR M4NQ Related Reference Manual name name (LQFP176) (LQFP144) (LQFP100) (BGA177) (BGA145) EMAPPSOUT0 EMAPPSOUT1 EMAMDC EMAMDIO EMACOL EMACRS EMARXDV EMARXER EMATXEN EMARXCLK EMATXCLK EMARXD0 EMARXD1...

  • Page 21: Table 3.10 Signal Connection List (10/21)

    TXZ+ Family TMPM4N Group(1) Input/Output Ports Table 3.10 Signal connection list (10/21) Function pin Port M4NR M4NQ M4NN M4NR M4NQ Related Reference Manual name name (LQFP176) (LQFP144) (LQFP100) (BGA177) (BGA145) T32A00INA0 T32A00INA1 T32A00OUTA T32A00INB0 T32A00INB1 T32A00OUTB T32A00INC0 T32A00INC1 T32A00OUTC 32-bit Timer Event Counter T32A01INA0 T32A01INA1 T32A01OUTA...

  • Page 22: Table 3.11 Signal Connection List (11/21)

    TXZ+ Family TMPM4N Group(1) Input/Output Ports Table 3.11 Signal connection list (11/21) Function pin Port M4NR M4NQ M4NN M4NR M4NQ Related Reference Manual name name (LQFP176) (LQFP144) (LQFP100) (BGA177) (BGA145) T32A02INA0 T32A02INA1 T32A02OUTA T32A02INB0 T32A02INB1 T32A02OUTB T32A02INC0 32-bit Timer Event Counter T32A02INC1 T32A02OUTC T32A03INA0...

  • Page 23: Table 3.12 Signal Connection List (12/21)

    TXZ+ Family TMPM4N Group(1) Input/Output Ports Table 3.12 Signal connection list (12/21) Function pin Port M4NR M4NQ M4NN M4NR M4NQ Related Reference Manual name name (LQFP176) (LQFP144) (LQFP100) (BGA177) (BGA145) T32A04INA0 T32A04INA1 T32A04OUTA T32A04INB0 T32A04INB1 T32A04OUTB T32A04INC0 T32A04INC1 T32A04OUTC 32-bit Timer Event Counter T32A05INA0 T32A05INA1 T32A05OUTA...

  • Page 24: Table 3.13 Signal Connection List (13/21)

    TXZ+ Family TMPM4N Group(1) Input/Output Ports Table 3.13 Signal connection list (13/21) Function pin Port M4NR M4NQ M4NN M4NR M4NQ Related Reference Manual name name (LQFP176) (LQFP144) (LQFP100) (BGA177) (BGA145) T32A06INA0 T32A06INA1 T32A06OUTA T32A06INB0 T32A06INB1 T32A06OUTB T32A06INC0 T32A06INC1 T32A06OUTC 32-bit Timer Event Counter T32A07INA0 T32A07INA1 T32A07OUTA...

  • Page 25: Table 3.14 Signal Connection List (14/21)

    TXZ+ Family TMPM4N Group(1) Input/Output Ports Table 3.14 Signal connection list (14/21) Function pin Port M4NR M4NQ M4NN M4NR M4NQ Related Reference Manual name name (LQFP176) (LQFP144) (LQFP100) (BGA177) (BGA145) T32A08INA0 T32A08OUTA T32A08INB0 T32A08OUTB T32A08INC0 T32A08INC1 T32A08OUTC T32A09INA0 T32A09OUTA 32-bit Timer Event Counter T32A09INB0 T32A09OUTB T32A09INC0...

  • Page 26: Table 3.15 Signal Connection List (15/21)

    TXZ+ Family TMPM4N Group(1) Input/Output Ports Table 3.15 Signal connection list (15/21) Function pin Port M4NR M4NQ M4NN M4NR M4NQ Related Reference Manual name name (LQFP176) (LQFP144) (LQFP100) (BGA177) (BGA145) T32A10INA0 T32A10INA1 T32A10OUTA T32A10INB0 T32A10OUTB T32A10INC0 T32A10INC1 T32A10OUTC T32A11INA0 T32A11INA1 T32A11OUTA T32A11INB0 32-bit Timer Event Counter...

  • Page 27: Table 3.16 Signal Connection List (16/21)

    TXZ+ Family TMPM4N Group(1) Input/Output Ports Table 3.16 Signal connection list (16/21) Function pin Port M4NR M4NQ M4NN M4NR M4NQ Related Reference Manual name name (LQFP176) (LQFP144) (LQFP100) (BGA177) (BGA145) EA00 EA01 EA02 EA03 EA04 EA05 EA06 EA07 EA08 EA09 EA10 EA11 External Bus Interface...

  • Page 28: Table 3.17 Signal Connection List (17/21)

    TXZ+ Family TMPM4N Group(1) Input/Output Ports Table 3.17 Signal connection list (17/21) Function pin Port M4NR M4NQ M4NN M4NR M4NQ Related Reference Manual name name (LQFP176) (LQFP144) (LQFP100) (BGA177) (BGA145) ED00/EAD00 ED01/EAD01 ED02/EAD02 ED03/EAD03 ED04/EAD04 ED05/EAD05 ED06/EAD06 ED07/EAD07 ED08/EAD08 ED09/EAD09 ED10/EAD10 ED11/EAD11 ED12/EAD12...

  • Page 29: Table 3.18 Signal Connection List (18/21)

    TXZ+ Family TMPM4N Group(1) Input/Output Ports Table 3.18 Signal connection list (18/21) Function pin Port M4NR M4NQ M4NN M4NR M4NQ Related Reference Manual name name (LQFP176) (LQFP144) (LQFP100) (BGA177) (BGA145) AINA00 AINA01 AINA02 AINA03 AINA04 AINA05 AINA06 AINA07 AINA08 AINA09 AINA10 AINA11 12-bit Analog to Digital...

  • Page 30: Table 3.19 Signal Connection List (19/21)

    TXZ+ Family TMPM4N Group(1) Input/Output Ports Table 3.19 Signal connection list (19/21) Function pin Port M4NR M4NQ M4NN M4NR M4NQ Related Reference Manual name name (LQFP176) (LQFP144) (LQFP100) (BGA177) (BGA145) INT00a INT00b INT01a INT01b INT02a INT02b INT03a INT03b INT04a INT04b INT05a INT05b INT06b...

  • Page 31: Table 3.20 Signal Connection List (20/21)

    TXZ+ Family TMPM4N Group(1) Input/Output Ports Table 3.20 Signal connection list (20/21) Function pin Port M4NR M4NQ M4NN M4NR M4NQ Related Reference Manual name name (LQFP176) (LQFP144) (LQFP100) (BGA177) (BGA145) EMG0 OVV0 Advanced Programmable Motor Control Circuit Consumer Electronics Control CEC0 ALARM_N Real Time Clock RTCOUT...

  • Page 32: Table 3.21 Signal Connection List (21/21)

    TXZ+ Family TMPM4N Group(1) Input/Output Ports Table 3.21 Signal connection list (21/21) Function pin Port M4NR M4NQ M4NN M4NR M4NQ Related Reference Manual name name (LQFP176) (LQFP144) (LQFP100) (BGA177) (BGA145) Debug Interface Boundary-Scan TRST_N SWDIO SWCLK TRACECLK Debug Interface TRACEDATA0 TRACEDATA1 TRACEDATA2 TRACEDATA3...

  • Page 33: Registers

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 4. Registers The following registers should be set appropriately to use the ports. Each register is 32 bits. The configuration of the register depends on the port count and its function assignment. "x" and "n" in the following table show a port name and a function number, respectively. Register Name Type Setting Value...

  • Page 34: List Of Register

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 4.1. List of Register When the bit which is assigned to no functions is read, "0" is returned. The write to the bit is ignored. Table 4.1 Ports base address Peripheral function Channel/Unit Base address 0x400E0000 0x400E0100 0x400E0200...

  • Page 35: Table 4.2 Register List

    TXZ+ Family TMPM4N Group(1) Input/Output Ports Table 4.2 Register List Address Register Name Port A Port B Port C Port D Port E (Base+) Data Register 0x0000 [PADATA] [PBDATA] [PCDATA] [PDDATA] [PEDATA] Output Control Register 0x0004 [PACR] [PBCR] [PCCR] [PDCR] [PECR] Function Register 1 0x0008...
  • Page 36 TXZ+ Family TMPM4N Group(1) Input/Output Ports Address Register Name Port L Port M Port N Port P Port R (Base+) Data Register 0x0000 [PLDATA] [PMDATA] [PNDATA] [PPDATA] [PRDATA] Output Control Register 0x0004 [PLCR] [PMCR] [PNCR] [PPCR] [PRCR] Function Register 1 0x0008 [PLFR1] [PMFR1]...

  • Page 37: List Of Port Functions And Settings

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 4.2. List of Port Functions and Settings It is explained about the viewpoint of a port register setting table. The column of [PxFRn] shows the function register which should be set. When this register is set to "1", the corresponding function is enabled.

  • Page 38: Port A

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 4.2.2. PORT A Table 4.3 Port A registers setting Reset status Control register PORT PORT Input/Output Function Type [PADATA] [PACR] [PAFRn] [PAOD] [PAPUP] [PAPDN] [PAIE] After reset Input Port Input Output Port Output INT02a Input FTU4 EA00...
  • Page 39 TXZ+ Family TMPM4N Group(1) Input/Output Ports After reset Input Port Input Output Port Output EA06 Output FTU1 [PAFR1] T32A01OUTB Output FTU1 [PAFR3] TSPI0CS3 Output FTU1 [PAFR6] Input [PAFR7] TSPI2SCK FTU1 Output [PAFR7] EMAPPSOUT1 Output FTU1 [PAFR8] After reset Input Port Input Output Port Output...

  • Page 40: Port B

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 4.2.3. PORT B Table 4.4 Port B registers setting Reset status Control register PORT PORT Input/Output Function Type [PBDATA] [PBCR] [PBFRn] [PBOD] [PBPUP] [PBPDN] [PBIE] After reset Input Port Input Output Port Output INT04a Input FTU4 EA08...

  • Page 41: Port C

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 4.2.4. PORT C Table 4.5 Port C registers setting Reset status Control register PORT PORT Input/Output Function Type [PCDATA] [PCCR] [PCFRn] [PCOD] [PCPUP] [PCPDN] [PCIE] After reset Input Port Input Output Port Output EA20 Output FTU1 [PCFR1]...

  • Page 42: Port D

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 4.2.5. PORT D Table 4.6 Port D registers setting Reset status Control register PORT PORT Input/Output Function Type [PDDATA] [PDCR] [PDFRn] [PDOD] [PDPUP] [PDPDN] [PDIE] After reset Input Port Input Output Port Output ED00/EAD00 FTU14 [PDFR1] T32A04INB1...
  • Page 43 TXZ+ Family TMPM4N Group(1) Input/Output Ports After reset Input Port Input Output Port Output ED05/EAD05 FTU14 [PDFR1] T32A05OUTB Output FTU1 [PDFR3] Input [PDFR6] I2S0BCK FTU2 Output [PDFR6] Output FTU2 [PDFR7] TSSI0RXD Input FTU1 [PDFR8] After reset Input Port Input Output Port Output ED06/EAD06 FTU14...

  • Page 44: Port E

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 4.2.6. PORT E Table 4.7 Port E registers setting Reset status Control register PORT PORT Input/Output Function Type [PEDATA] [PECR] [PEFRn] [PEOD] [PEPUP] [PEPDN] [PEIE] After reset Input Port Input Output Port Output ED08/EAD08 FTU14 [PEFR1] T32A06INB1...
  • Page 45 TXZ+ Family TMPM4N Group(1) Input/Output Ports After reset Input Port Input Output Port Output ED13/EAD13 FTU14 [PEFR1] T32A07INB0 Input FTU1 [PEFR3] EA18 Output FTU1 [PEFR4] T32A07INC1 Input FTU1 [PEFR5] I2S1DI Input FTU1 [PEFR6] ISDAIN1 Input FTU15 EA10 Output FTU1 [PEFR8] After reset Input Port Input...

  • Page 46: Port F

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 4.2.7. PORT F Table 4.8 Port F registers setting Reset status Control register PORT PORT Input/Output Function Type [PFDATA] [PFCR] [PFFRn] [PFOD] [PFPUP] [PFPDN] [PFIE] After reset Input Port Input Output Port Output INT04b Input FTU4 ERD_N...

  • Page 47: Port G

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 4.2.8. PORT G Table 4.9 Port G registers setting Reset status Control register PORT PORT Input/Output Function Type [PGDATA] [PGCR] [PGFRn] [PGOD] [PGPUP] [PGPDN] [PGIE] After reset Input Port Input Output Port Output INT08a Input FTU4 EALE...
  • Page 48 TXZ+ Family TMPM4N Group(1) Input/Output Ports After reset Input Port Input Output Port Output T32A02OUTA Output FTU1 [PGFR2] T32A02OUTC Output FTU1 [PGFR3] FUT0IRIN Input FTU1 [PGFR4] FUT0RXD Input FTU1 [PGFR5] EI2C2SCL FTU1 [PGFR6] I2C2SCL FTU1 [PGFR7] EMARXD3 Input FTU1 [PGFR8] After reset Input Port Input...

  • Page 49: Port H

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 4.2.9. PORT H Table 4.10 Port H registers setting Reset status Control register PORT PORT Input/Output Function Type [PHDATA] [PHCR] [PHFRn] [PHOD] [PHPUP] [PHPDN] [PHIE] After reset Input Port Input Output Port Output TRACEDATA1 Output FTU1 [PHFR1]...

  • Page 50: Port J

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 4.2.10. PORT J Table 4.11 Port J registers setting Reset status Control register PORT PORT Input/Output Function Type [PJDATA] [PJCR] [PJFRn] [PJOD] [PJPUP] [PJPDN] [PJIE] After reset Input Port Input Output Port Output UT5RXD Input FTU1 [PJFR3]...

  • Page 51: Port K

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 4.2.11. PORT K Table 4.12 Port K registers setting Reset status Control register PORT PORT Input/Output Function Type [PKDATA] [PKCR] [PKFRn] [PKOD] [PKPUP] [PKPDN] [PKIE] After reset Input Port Input Output Port Output INT10a Input FTU4 ISDAOUT...
  • Page 52 TXZ+ Family TMPM4N Group(1) Input/Output Ports After reset Input Port Input Output Port Output TSPI1CS3 Output FTU1 [PKFR1] T32A01INA0 Input FTU1 [PKFR2] T32A01INC0 Input FTU1 [PKFR3] Input [PKFR4] TSPI3SCK FTU1 Output [PKFR4] SMI0CLK Output FTU2 [PKFR6] EMATXD2 Output FTU1 [PKFR8] After reset Input Port Input...

  • Page 53: Port L

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 4.2.12. PORT L Table 4.13 Port L registers setting Reset status Control register PORT PORT Input/Output Function Type [PLDATA] [PLCR] [PLFRn] [PLOD] [PLPUP] [PLPDN] [PLIE] After reset Input Port Input Output Port Output INT01a Input FTU4 T32A02INA0...
  • Page 54 TXZ+ Family TMPM4N Group(1) Input/Output Ports After reset Input Port Input Output Port Output INT03b Input FTU4 T32A09OUTA Output FTU1 [PLFR2] T32A09OUTC Output FTU1 [PLFR3] After reset Input Port Input Output Port Output TRGIN1 Input FTU1 [PLFR1] T32A09OUTB Output FTU1 [PLFR2] 2021-01-18 54 / 82...

  • Page 55: Port M

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 4.2.13. PORT M Table 4.14 Port M registers setting Reset status Control register PORT PORT Input/Output Function Type [PMDATA] [PMCR] [PMFRn] [PMOD] [PMPUP] [PMPDN] [PMIE] After reset Input Port Input Output Port Output EI2C3SDA FTU1 [PMFR1] I2C3SDA...
  • Page 56 TXZ+ Family TMPM4N Group(1) Input/Output Ports After reset Input Port Input Output Port Output T32A06OUTA Output FTU1 [PMFR2] T32A06OUTC Output FTU1 [PMFR3] Input [PMFR6] TSPI7SCK FTU1 Output [PMFR6] FUT1RTS_N Output FTU1 [PMFR7] After reset Input Port Input Output Port Output EI2C4SDA FTU1 [PMFR1]...

  • Page 57: Port N

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 4.2.14. PORT N Table 4.15 Port N registers setting Reset status Control register PORT PORT Input/Output Function Type [PNDATA] [PNCR] [PNFRn] [PNOD] [PNPUP] [PNPDN] [PNIE] After reset Input Port Input Output Port Output AINA00 (Note) Input FTU5 After reset...

  • Page 58: Port P

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 4.2.15. PORT P Table 4.16 Port P registers setting Reset status Control register PORT PORT Input/Output Function Type [PPDATA] [PPCR] [PPFRn] [PPOD] [PPPUP] [PPPDN] [PPIE] After reset Input Port Input Output Port Output AINA08 (Note) Input FTU5 T32A04INA0...
  • Page 59 TXZ+ Family TMPM4N Group(1) Input/Output Ports After reset Input Port Input Output Port Output AINA15 (Note) Input FTU5 INT11b Input FTU4 T32A07INB0 Input FTU1 [PPFR2] T32A07INC1 Input FTU1 [PPFR3] T32A07INA1 Input FTU1 [PPFR5] Note: When using analog input (AINAx), [PPCR] should be output disable "0", [PPIE] should be input disable "0", [PPPUP] should be pull-up disable "0"...

  • Page 60: Port R

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 4.2.16. PORT R Table 4.17 Port R registers setting Reset status Control register PORT PORT Input/Output Function Type [PRDATA] [PRCR] [PRFRn] [PROD] [PRPUP] [PRPDN] [PRIE] After reset Input Port Input Output Port Output AINA16 (Note) Input FTU5 T32A08INA0...

  • Page 61: Port T

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 4.2.17. PORT T Table 4.18 Port T registers setting Reset status Control register PORT PORT Input/Output Function Type [PTDATA] [PTCR] [PTFRn] [PTOD] [PTPUP] [PTPDN] [PTIE] After reset Input Port Input Output Port Output DAC0 (Note) Output FTU13 After reset...

  • Page 62: Port U

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 4.2.18. PORT U Table 4.19 Port U registers setting Reset status Control register PORT PORT Input/Output Function Type [PUDATA] [PUCR] [PUFRn] [PUOD] [PUPUP] [PUPDN] [PUIE] After reset Input Port Input Output Port Output T32A12OUTA Output FTU1 [PUFR2]...
  • Page 63 TXZ+ Family TMPM4N Group(1) Input/Output Ports After reset Input Port Input Output Port Output T32A13OUTA Output FTU1 [PUFR2] T32A13OUTC Output FTU1 [PUFR3] Input [PUFR6] TSSI1RFS FTU2 Output [PUFR6] UT3RXD Input FTU1 [PUFR7] CANBRX Input FTU1 [PUFR8] After reset Input Port Input Output Port Output...

  • Page 64: Port V

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 4.2.19. PORT V Table 4.20 Port V registers setting Reset status Control register PORT PORT Input/Output Function Type [PVDATA] [PVCR] [PVFRn] [PVOD] [PVPUP] [PVPDN] [PVIE] After reset Input Port Input Output Port Output T32A09INA0 Input FTU1 [PVFR2]...
  • Page 65 TXZ+ Family TMPM4N Group(1) Input/Output Ports After reset Input Port Input Output Port Output EI2C2SDA FTU1 [PVFR1] T32A04OUTA Output FTU1 [PVFR2] T32A04OUTC Output FTU1 [PVFR3] TSPI5TXD Output FTU2 [PVFR4] Output FTU2 [PVFR5] I2C2SDA FTU1 [PVFR6] UT1TXDA Output FTU1 [PVFR7] CANARX Input FTU1 [PVFR8]...

  • Page 66: Port W

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 4.2.20. PORT W Table 4.21 Port W registers setting Reset status Control register PORT PORT Input/Output Function Type [PWDATA] [PWCR] [PWFRn] [PWOD] [PWPUP] [PWPDN] [PWIE] After reset Input Port Input Output Port Output TSPI8CS0 Output FTU1 [PWFR4]...

  • Page 67: Port Y

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 4.2.21. PORT Y Table 4.22 Port Y registers setting Reset status Control register PORT PORT Input/Output Function Type [PYDATA] [PYCR] [PYFRn] [PYOD] [PYPUP] [PYPDN] [PYIE] After reset Input Port Input Input FTU10 EHCLKIN Input FTU10 After reset Input Port...

  • Page 68: Block Diagrams Of Ports

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 5. Block Diagrams of Ports The ports have some types of circuits, FTU1 to FTU6, FTU10, FTU13 to FTU15. Each circuit diagram is shown in the following pages. The dot line block shows an equivalent circuit which is described in "Datasheet". The "I/O Reset"...

  • Page 69: Type Ftu1

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 5.1. Type FTU1 <PTKEEP> I/O reset [PxPUP] (Pull-up control) [PxPDN] (Pull-down control) [PxCR] (Output control) [PxFRn] (Function control) Function output Port [PxDATA] Input/Output (Output latch) [PxOD] (Open-drain control) [PxIE] (Input control) Port read Function input Figure 5.1 Port Type FTU1 2021-01-18 69 / 82...

  • Page 70: Type Ftu2

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 5.2. Type FTU2 <PTKEEP> I/O reset [PxPUP] (Pull-up control) [PxPDN] (Pull-down control) [PxCR] (Output control) Output function enable [PxFRn] (Function control) Function output Port [PxDATA] Input/Output (Output latch) [PxOD] (Open-drain control) [PxIE] (Input control) Port read Function input Figure 5.2 Port Type FTU2...

  • Page 71: Type Ftu2B

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 5.3. Type FTU2b <PTKEEP> I/O reset [PxPUP] (Pull-up control) [PxPDN] (Pull-down control) [PxCR] (Output control) Output function enable [PxFRn] (Function control) Function output Port [PxDATA] Input/Output (Output latch) [PxOD] (Open-drain control) [PxIE] (Input control) Port read Function input Figure 5.3 Port Type FTU2b...

  • Page 72: Type Ftu3

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 5.4. Type FTU3 <PTKEEP> I/O reset [PxPUP] (Pull-up control) [PxPDN] (Pull-down control) [PxCR] (Output control) [PxFRn] (Function control) Port [PxDATA] Input/Output (Output latch) [PxOD] (Open-drain control) [PxIE] (Input control) Port read Noise filter Function input (30ns Typ.) Figure 5.4 Port Type FTU3 Note: There is no noise filter for NBDCLK and NBDSYNC pins.

  • Page 73: Type Ftu4

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 5.5. Type FTU4 <PTKEEP> I/O reset [PxPUP] (Pull-up control) [PxPDN] (Pull-down control) [PxCR] (Output control) Port [PxDATA] Input/Output (Output latch) [PxOD] (Open-drain control) [PxIE] (Input control) Port read Noise filter Function input (30ns Typ.) Figure 5.5 Port Type FTU4 2021-01-18 73 / 82...

  • Page 74: Type Ftu5

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 5.6. Type FTU5 <PTKEEP> I/O reset [PxPUP] (Pull-up control) [PxPDN] (Pull-down control) [PxCR] (Output control) Port [PxDATA] Input/Output (Output latch) [PxOD] (Open-drain control) [PxIE] (Input control) Analog input Port read Figure 5.6 Port Type FTU5 2021-01-18 74 / 82 Rev.

  • Page 75: Type Ftu6

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 5.7. Type FTU6 <PTKEEP> RESET_N [PxPUP] (Pull-up control) [PxPDN] (Pull-down control) [PxCR] (Output control) Port [PxDATA] Input/Output (Output latch) [PxOD] (Open-drain control) BOOT_N Figure 5.7 Port Type FTU6 2021-01-18 75 / 82 Rev. 1.0...

  • Page 76: Type Ftu10

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 5.8. Type FTU10 <PTKEEP> I/O reset [PxPUP] (Pull-up control) [PxPDN] (Pull-down control) ポート 入力 [PxIE] (Input control) External clock input Oscillation circuit Port read Figure 5.8 Port Type FTU10 2021-01-18 76 / 82 Rev. 1.0...

  • Page 77: Type Ftu13

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 5.9. Type FTU13 <PTKEEP> I/O reset [PxPUP] (Pull-up control) [PxPDN] (Pull-down control) [PxCR] (Output control) Port [PxDATA] Input/Output (Output latch) [PxOD] (Open-drain control) [PxIE] (Input control) Analog output Port read Figure 5.9 Port Type FTU13 2021-01-18 77 / 82 Rev.

  • Page 78: Type Ftu14

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 5.10. Type FTU14 <PTKEEP> [PxPUP] (Pull-up control) [PxPDN] (Pull-down control) [PxCR] (Output control) Output control enable [PxFRn] (Function control) Function output Port [PxDATA] Input/Output (Output latch) [PxOD] (Open-drain control) [PxIE] (Input control) Port read Function input Function input enable Figure 5.10 Port Type FTU14...

  • Page 79: Type Ftu15

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 5.11. Type FTU15 <PTKEEP> I/O reset [PxPUP] (Pull-up control) [PxPDN] (Pull-down control) [PxCR] (Output control) [PxFRn] (function control) Function output Port [PxDATA] Input/Output (Output latch) [PxOD] (Open-drain control) [PxIE] (Input control) Port read Function input Figure 5.11 Port Type FTU15 2021-01-18 79 / 82...

  • Page 80: Precaution

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 6. Precaution 6.1. Pin status during the reset period During the reset period, the pin status is high impedance except for below pins. And, the pull-up/pull-down is invalid. ‒ The debug interface alternate pins (PH3 to PH7) are debug pin status. ‒...

  • Page 81: Revision History

    TXZ+ Family TMPM4N Group(1) Input/Output Ports 7. Revision History Table 7.1 Revision History Revision Date Description 2021-01-18 - First release 2021-01-18 81 / 82 Rev. 1.0...

  • Page 82: Restrictions On Product Use

    Before customers use the Product, create designs including the Product, or incorporate the Product into their own applications, customers must also refer to and comply with (a) the latest versions of all relevant TOSHIBA information, including without limitation, this document, the specifications, the data sheets and application notes for Product and the precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook"...

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