Pioneer CDJ-900 Service Manual page 83

5
C 3/3
CPU RESET
3)
C H A R G E V+1R2_CPLL1
V+3R3_CPU
R E S T _ E R
IC102 V+1R2_CPLL2
rom DEBUG
1 5
E R V D D 10
11
CPU_RST C159
R 1 5 8
2
S U B
0.1u
1 0 0 k
3 4
G N D V O U T C160
C P U _ R S T
to DEBUG& 0.1u
BD45302G
IC122
C 2 4 6
CCG1171-A-T 10u
GNDD
C 2 4 7
CCG1171-A-T
10u
D
GNDD
(CPU_RST)
CPU_BUS
38
R 3 1 2 1
4 7
AB22
V22 W22 Y22 AA22
A22/PB4/ A24/PB6/ PRESET# VSS94 XTAL
CTS1# DACK0#/
CTS0#
V21 W21 Y21 AA21 AB21
ASEBRKAK# VSS90 VSS93 EXTAL
23/PB5/
/BRKACK/
TEND0#/
TCLK/PC1
TS1#
AB20
V20 W20 Y20 AA20
21/PB3 VSS87 BS# VSS-PLL1 VDD-PLL1
AB19
V19 W19 Y19 AA19
VSS86 BREQ# VSS-PLL2 VDD-PLL2
A25/PB7/
DREQ0#/
RTS0#
V18 W18 Y18 AA18 AB18
VDDQ30 CS0# VSS89 BACK# VSS97
CPU_NMI R 1 6 5
AA17
W17 Y17 AB17
V17
CS3# RD# NMI RDY#
VDDQ29
V16 W16 Y16 AA16 AB16
VSS76 VSS85 PI0/COM/CDE VSS92 VSS96
V15 W15 Y15 AA15 AB15
LCD_DON/
VSS75 VSS84 LCD_CL2/ LCD_DATA0/
DCLKOUT/
DE_V/ DB0/
PH2
CLS/PH3 BT_DATA0
V14 W14 Y14 AA14 AB14
LCD_DATA2/ LCD_DATA1/
VDDQ28 VSS83 LCD_DATA3/
DB2/ DB1/
DB3/
BT_DATA2 BT_DATA1
BT_DATA3
AB13
V13 W13 Y13 AA13
LCD_DATA4/DB4
VDDQ27 VSS82 LCD_DATA6/DG0/
LCD_DATA5/DB5
/BT_DATA4/PI1
BT_DATA6/PI3
/BT_DATA5/PI2
AB12
V12 W12 Y12
AA12
LCD_DATA7/DG1/
VDD32 LCD_DATA9/ LCD_DATA8/
VSS81
BT_DATA7/PI4
DG3/PG1 DG2/PG0
AB11
V11 W11 Y11 AA11
VDD31 VSS80 LCD_DATA12/ LCD_DATA11/ LCD_DATA10/
DR0/PG4 DG5/PG3 DG4/PG2
AB10
V10 W10 Y10 AA10
VDDQ26 VSS79 LCD_DATA15/ LCD_DATA14/ LCD_DATA13/
DR3/PG7 DR2/PG6 DR1/PG5
LCD_M_DISP/
CPU_LCD_CLK
DE_H/DE_C/BT_DE_C
V9 W9 Y9
AA9 AB9
VDDQ25 VSS78 LCD_VCPWC/ LCD_CLK/
DR4/PH1 DCLKIN
LCD_FLM/VSYNC/SPS/
V8 W8 Y8 EX_VSYNC/BT_VSYNC
AA8 AB8
VDDQ24 VSS77 LCD_VEPWC/
LCD_CL1/HSYNC/SPL/
DR5/PH0
EX_HSYNC/BT_HSYNC
Y7 AA7 AB7
V7 W7
VSS74 TRST# VSS88 VSS91 VSS95
AB6
V6 W6 Y6 AA6
VSS73 TDO TMS TDI TCK
V5 W5 Y5 AA5 AB5
TXD0/
VDDQ23 WDTOVF#/ RXD0/ SCK0/AUDSYNC/
AUDATA1
IRQ1/AUDCK/ AUDATA0 FCLE
DACK1#
AB4
CPU_SCK1
V4 W4 Y4 AA4
MODE4/FD4 VDDQ31 RXD1/
TXD1/ SCK1/FR/B#
AUDATA1
AUDATA3
R 1 6 7
AB3
V3 W3 Y3 AA3
MODE5/FD5 MODE1/FD1 VDDQ32 MODE0/FD0 SDA
R 1 6 8
AB2
V2 W2 Y2 AA2
PJ0/ MODE2/FD2 RXD2/PA1 VDDQ33 SCL
DIRECTION_M
V1 W1 Y1 AA1 AB1
MODE3/ TXD2/PA2 SCK2/PA0 VDDQ34
PJ1/
FD3
IDERST_M#
CPU-USB-ETH-SD
CPU_BUS
CPU-DSP-DAC-PANEL
V+3R3_CPU
5
6
V+3R3_CPU
CPU_ADDRESS_BUS
CPU_DATA_BUS
CPU-DSP-DAC-PANEL
26.965MHz
OSC
V+3R3_CPU
IC124
TC7WHU04FU
CPU_FLCON_RST
DSP710_CS
V C C
8 1 1 A
1 Y 7 2 3 Y
3 A
6 3 2 A
2 Y 5 4 G N D
42
R 3 1 9
1 M
GNDD
X 1 0 5
26.965MHz
D S S 1 1 8 5 - A DSP710_RST
(DSP RESET)
ETHER_RST
USB_RST
V+3R3_CPU
27
C 2/3
C P U _ R D Y
from DSP(2/3) 6
0
C P U _ R D
to FLASH&DSP&USB
5
F L A S H _ R D Y
from FLASH
7
CPU_INT_DSP
2
C P U _ R / W
from CPU
CPU_USB_HSTPWREN
CPU_USB_HSTLED
CPU_USB_HSTSTOP
CPU_PNL_CNVss
CPU_PNL_BUSY
CPU_USB_HSTPWRFL
CONT01
CONT00
CPU_EUP_CONT
CONT02
V+3R3_CPU
CPU_PH1
R 3 4 3
4 7 k
CPU_PH0
CPU_AUDCK
CPU_TDO
CPU_TRST
CPU_TMS
CPU_TDI
CPU_TCK
CPU_AUDATA0
CPU_AUDATA1
CPU_AUDSYNC
CPU_AUDATA2
CPU_AUDATA3
2
R 3 3 9
4 7 k
C P U _ R / W
from CPU
CPU_MODE0
CPU_SDA
V+3R3_CPU
1 0
R 1 7 0
4 . 7 k
R 1 7 2
4 . 7 k
CPU_SCL
1 0
CPU_RXD2
V+3R3_CPU
R 1 8 0
4 . 7 k
CPU_SCK2
CPU_TXD2
CPU_MODE3
CPU_MODE2
CPU_MODE1
CPU_MODE5
CPU_MODE4
6
C-b
1/3
for CPU 3.3V
GNDD
V+3R3_CPU
RESET LOGICAL CIRCUIT
C 2 4 4
10
0.1u
C P U _ R S T
IC122
from Reset IC
1 A 1 8 V C C
8
1 B 2 7 1 Y
2 Y 3 6 2 B
C P U _ D S P 7 1 0 _ B O O T
G N D 4 5 2 A from CPU
V+3R3_CPU
TC7W08FU
GNDD
CPU_CS3
C 2 4 5 0.1u
IC123
(DSP RESET)
R 3 6 4
1 A 1 1 4 V C C
4 . 7 k
CPU_DSP710_RST 1 B 2 1 3 4 B
1 Y 3 1 2 4 A
R 3 6 5 2 A 4 1 1 4 Y
CPU_ETHER_RST 4 . 7 k 2 B 5 1 0 3 B
6 9
2 Y 3 A
R 3 6 6
G N D 7 8 3 Y
4 . 7 k
GNDD TC74VHC08FTS1
CPU_USB_RST
V+3R3_CPU
C 2 0 4
CCG1171-A
10u IC108
C 2 0 2 54
1
V D D 1 VSS3
0.1u
2 53
CPU_DATA0
D Q 0 DQ15
C 2 1 5
3 52
V D D Q 1 VSSQ4
0.1u 4 51
CPU_DATA1
D Q 1 DQ14
5 50
CPU_DATA2
D Q 2 DQ13
C 2 1 9
49
6
V S S Q 1 VDDQ4
0.1u
7 4 8
CPU_DATA3
D Q 3 D Q 1 2
8 4 7
CPU_DATA4
D Q 4 D Q 1 1
C 2 1 6
9 4 6
V D D Q 2 V S S Q 3
0.1u
CPU_DATA5 1 0 4 5
D Q 5 D Q 1 0
CPU_DATA6 1 1 4 4
D Q 6 D Q 9
C 2 2 0
1 2 4 3
V S S Q 2 V D D Q 3
1 3 4 2 1000p
CPU_DATA7
D Q 7 D Q 8
C 2 1 7
1 4 4 1
V D D 2 V S S 2
1000p
1 5 L D Q M 4 0
CPU_LLDQM
N . C / R F U
1 6 3 9
W E U D Q M
1 7 3 8
CPU_CAS
C A S C L K
1 8 3 7
CPU_RAS
R A S C K E
CPU_CS1 1 9 3 6 CPU_ADRS12
C S A 1 2
2 0 3 5 CPU_ADRS11
CPU_ADRS13
B A 0 A 1 1
2 1 3 4
CPU_ADRS14
B A 1 A 9
2 2 3 3
CPU_ADRS10
A 1 0 / A P A 8
2 3 3 2
CPU_ADRS0
A 0 A 7
CPU_ADRS1 2 4 3 1
A 1 A 6
2 5 3 0
CPU_ADRS2
A 2 A 5
2 6 2 9
CPU_ADRS3
A 3 A 4
C 2 1 8
2 7 2 8
V D D 3 V S S 1
0.1u
K4S561632J-UC75
256M SDRAM
GNDD
Low
(SDRAM CLK)
R 3 6 3
CPU_CLKOUT
2 2
IC109
C 2 0 3
1 54
V D D 1 VSS3
0.1u
2 53
CPU_DATA16
DQ15
D Q 0
C 2 2 1 52
3
V D D Q 1 VSSQ4
0.1u
4 51
CPU_DATA17
D Q 1 DQ14
50
CPU_DATA18 5
D Q 2 DQ13
C 2 2 5
6 49
V S S Q 1 VDDQ4
7 4 8 0.1u
CPU_DATA19
D Q 3 D Q 1 2
CPU_DATA20 8 4 7
D Q 4 D Q 1 1
C 2 2 2
9 4 6
V D D Q 2 V S S Q 3
0.1u
CPU_DATA21 1 0 4 5
D Q 5 D Q 1 0
1 1 4 4
CPU_DATA22
D Q 6 D Q 9
C 2 2 6
1 2 4 3
V S S Q 2 V D D Q 3
1000p
CPU_DATA23 1 3 4 2
D Q 7 D Q 8
C 2 2 3
1 4 4 1
V D D 2 V S S 2
1000p
1 5 L D Q M 4 0
CPU_ULDQM
N . C / R F U
1 6 3 9
W E U D Q M
1 7 3 8
CPU_CAS
C A S C L K
CPU_RAS 1 8 3 7
R A S C K E
1 9 3 6
CPU_CS1
C S A 1 2
2 0 3 5
CPU_ADRS13
B A 0 A 1 1
CPU_ADRS14 2 1 3 4
B A 1 A 9
2 2 3 3
CPU_ADRS10
A 1 0 / A P A 8
CPU_ADRS0 2 3 3 2
A 0 A 7
2 4 3 1
CPU_ADRS1
A 1 A 6
2 5 3 0
CPU_ADRS2
A 2 A 5
CPU_ADRS3 2 6 2 9
A 3 A 4
C 2 2 4
2 7
2 8
V D D 3 V S S 1
0.1u
K4S561632J-UC75
256M SDRAM
GNDD
High
CPU_ADDRESS_BUS
CPU_DATA_BUS
CPU_BUS
CPU-USB-ETH-SD
CDJ-900
7
C
1/3
MAIN ASSY (DWX3019)
Large size
A-a A-b
SCH diagram
V+3R3_CPU
C 2 4 3
0.1u
IC119
TC74LCX32FTS1
1 A 1 1 4 V C C
1 B 2 1 3 4 B
1 Y 3 1 2 4 A
2 A 4 1 1 4 Y
24
5 1 0 3 B
2 B
6 9
2 Y 3 A
7 8
G N D 3 Y
GNDD
CPU_DATA_BUS
CPU_DATA15
CPU_DATA14
CPU_DATA13
CPU_DATA12
CPU_DATA11
CPU_DATA10
CPU_DATA9
CPU_DATA_BUS_R
CPU_DATA8 CPU_BUS
V+3R3_CPU
FLASH ROM
CPU_LUDQM
DYW1775-
25
IC114
CPU_ADRS16R 1 4 8
A 1 5 A 1 6
2 4 7
CPU_ADRS15R
A 1 4 B Y T E #
CPU_ADRS9
R 3 0 9 2
CPU_ADRS14R 3 4 6
1 0
A 1 3 V S S 2
CPU_ADRS8 R 3 0 9 1
4 4 5
CPU_ADRS13R 1 0
D Q 1 5 / A - 1
A 1 2
CPU_ADRS7
R 3 0 9 0
5 4 4
CPU_ADRS12R 1 0
A 1 1 D Q 7
CPU_ADRS6
R 3 0 8 9
CPU_ADRS11R 6 4 3
1 0
A 1 0 D Q 1 4
CPU_ADRS5
R 3 0 8 8
7 4 2
CPU_ADRS10R 1 0
A 9 D Q 6
CPU_ADRS4
R 3 0 8 7
CPU_ADRS9R 8 4 1
1 0
A 8 D Q 1 3
9 4 0
CPU_ADRS20R
A 1 9 D Q 5
1 0 3 9
CPU_ADRS21R
A 2 0 D Q 1 2
1 1 3 8
C P U _ W E 0
W E # D Q 4
from CPU
3 1 2 3 7
R E S E T # V C C
R 2 6 7
1 3 3 6
CPU_ADRS22
A 2 1 D Q 1 1
N M 1 4 W P # / A C C 3 5
F L A S H _ R D Y
7
D Q 3
to CPU
R 2 6 8
1 5 R Y / B Y # 3 4
D Q 1 0
0
CPU_ADRS19R 1 6 3 3
A 1 8 D Q 2
1 7 3 2
CPU_ADRS18R
A 1 7 D Q 9
R 3 0 8 6
1 8 3 1
CPU_ADRS8R 1 0
A 7 D Q 1
R 3 0 8 5
CPU_ADRS7R 1 9 3 0
1 0
A 6 D Q 8
R 3 0 8 4
2 0 2 9
CPU_ADRS6R
1 0
A 5 D Q 0
R 3 0 8 3
CPU_ADRS5R 2 1 2 8
1 0
A 4 O E #
R 3 0 8 2
2 2 2 7
CPU_ADRS4R
1 0
A 3 V S S 1
R 3 0 8 1
2 3 2 6
CPU_ADRS3R 1 0
A 2 C E #
4.7k
R 3 0 8 0
CPU_ADRS2R 2 4 2 5
1 0
A 1 A 0
R 2 6 6
CPU_DATA31
680 R 2 9 5
N M
CPU_DATA30
MAKER PART NO:S29GL032N90TFI030
CPU_DATA29
11 10
V+3R3_CPU
CPU_DATA28
CPU_DATA27
CPU_DATA26
CPU_AUDATA0
CPU_DATA25
CPU_AUDATA2
CPU_AUDSYNC
CPU_DATA24
CPU_MPMD
CPU_AUDATA1
CPU_AUDCK
CPU_UUDQM
CPU_AUDATA3
CPU_TDO
CPU_CKE
CPU_TCK
CPU_ADRS12
CPU_TMS
CPU_ADRS11
CPU_TDI
CPU_ADRS9
CPU_EMU_BRK
CPU_ADRS8
CPU_TRST
CPU_ADRS7
R 3 3 2
for Debug
CPU_ADRS6
1 k
GNDD
CPU_ADRS5
V+3R3_CPU
CPU_ADRS4
R 2 8 7
4 . 7 k
CPU_MODE0
MODE[2:0]
CPU_MODE1
R 2 8 8
CPU_MODE2
4 . 7 k
MODE[4:3] BUS WIDTH
CPU_MODE3
R 2 9 1
4 . 7 k
CPU_MODE4
CPU_MODE5
MODE5
R 2 9 2
CPU_MODE7
4 . 7 k
CPU_MODE8
MODE7
MODE8
GNDD
7
8
A
A-a A-b
Guide page
Detailed page
A-a A-b
CPU-DSP-DAC-PANEL
C 2/3
B
C 1 9 9
0.1u
IC120
VCC
OUTY INA
GND
TC7SH04FUS1
GNDD
CHIP SELECT
DISTRIBUTION CIRCUIT
USB_CS
C
C 2 1 1
CCG1171-A-T
10u
CPU_ADRS17R
CPU_DATA15
CPU_DATA7
CPU_DATA14
CPU_DATA6
CPU_DATA13
CPU_DATA5
CPU_DATA12
CPU_DATA4
C 2 1 4
0.1u
CPU_DATA11
CPU_DATA3
CPU_DATA10
CPU_DATA2
D
CPU_DATA9
CPU_DATA1
CPU_DATA8
CPU_DATA0
from CPU
C P U _ R D
R 2 9 7
5
FLASH_CS
CPU_ADRS1R
GNDD
C N 1 0 1
N M
1
C P U _ R S T
2
From RESET IC
R E S T _ E R
3
to RESET IC
4
5
6
39
7
8
9
1 0
1 1
1 2
E
1 3
1 4
1 5
1 6
1 7
CLOCK MODE
010(2):X10
011(3):X12
OTHER:NG
00(0):RESERVED
01(1):SRAM 8bit
10(2):SRAM 16bit
11(3):SRAM 32bit
ENDIAN
0:BIG
1:LITTLE
USB CLOCK
0:EXT CLOCK
1:XTAL
SYSTEM CLOCK
0:EXT CLOCK
1:XTAL
F
C
1/3
83
8