Epson S1D10605 Series Manual
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Epson S1D10605 Series Manual

Epson S1D10605 Series Manual

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MF1323-06
S1D10605 Series
Rev.2.1

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Summary of Contents for Epson S1D10605 Series

  • Page 1 MF1323-06 S1D10605 Series Rev.2.1...

  • Page 2: Table Of Contents

    SED1065 Series Contents 1. DESCRIPTION ..............................1 2. FEATURES ................................ 1 3. BLOCK DIAGRAM ............................. 3 4. PAD LAYOUT ..............................4 5. PAD CENTER COORDINATES ........................5 6. PIN DESCRIPTIONS ............................11 7. FUNCTION DESCRIPTION ..........................15 8. COMMAND DESCRIPTION ..........................37 9.

  • Page 3: Description

    • High-speed 8-bit MPU interface (The chip can be connected directly to the both the 80x86 series MPUs The S1D10605 Series is a series of single-chip dot and the 6800 series MPUs) matrix liquid crystal display drivers that can be con- /Serial interfaces are supported.
  • Page 4 S1D10605 Series Series Specifications Reset pin Chip Product name Duty Bias temperature noise rejection Thickness gradient S1D10605D00B000 1/65 1/9, 1/7 –0.05%/˚C — 625µm S1D10606D00B000 1/49 1/8, 1/6 –0.05%/˚C — 625µm S1D10607D00B000 1/33 1/6, 1/5 –0.05%/˚C — 625µm S1D10608D00B000 1/55 1/8, 1/6 –0.05%/˚C...

  • Page 5: Block Diagram

    S1D10605 Series 3. BLOCK DIAGRAM Example: S1D10605 ***** • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • •...

  • Page 6: Pad Layout

    S1D10605 Series 4. PAD LAYOUT S1D10605 Series (0, 0) Die No. D1065D Item Size Unit 7.93 × 2.25 Chip Size Chip Thickness 0.625 Bump Pitch 50 (Min.) 55 × 76 Bump Size PAD No. 1 to 24 45 × 76 PAD No.

  • Page 7: Pad Center Coordinates

    S1D10605 Series 5. PAD CENTER COORDINATES Units: µm PIN Name X BUMP Y BUMP S1D10605 S1D10606 S1D10607 S1D10608 S1D10609 Size Size DUMMY1 DUMMY1 DUMMY1 DUMMY1 DUMMY1 3443 3360 3277 3194 3111 TEST0 TEST0 TEST0 TEST0 TEST0 3029 2946 2863 2780...
  • Page 8 S1D10605 Series Unit : µm PIN Name X BUMP Y BUMP S1D10605 S1D10606 S1D10607 S1D10608 S1D10609 Size Size –380 –442 –504 –565 –627 –689 DUMMY5 DUMMY5 DUMMY5 DUMMY5 DUMMY5 –750 –812 –874 –935 –997 –1058 –1120 DUMMY6 DUMMY6 DUMMY6 DUMMY6 DUMMY6 –1182...
  • Page 9 S1D10605 Series Units : µm PIN Name X BUMP Y BUMP S1D10605 S1D10606 S1D10607 S1D10608 S1D10609 Size Size COM23 COM19 COM11 COM20 COM20 –3794 COM22 COM18 COM11 COM19 COM19 COM21 COM17 COM10 COM18 COM18 COM20 COM16 COM10 COM17 COM17 COM19...
  • Page 10 S1D10605 Series Units : µm PIN Name X BUMP Y BUMP S1D10605 S1D10606 S1D10607 S1D10608 S1D10609 Size Size SEG24 SEG24 SEG24 SEG24 SEG24 –2077 –958 SEG25 SEG25 SEG25 SEG25 SEG25 –2027 SEG26 SEG26 SEG26 SEG26 SEG26 –1977 SEG27 SEG27 SEG27...
  • Page 11 S1D10605 Series Units : µm PIN Name X BUMP Y BUMP S1D10605 S1D10606 S1D10607 S1D10608 S1D10609 Size Size SEG78 SEG78 SEG78 SEG78 SEG78 –958 SEG79 SEG79 SEG79 SEG79 SEG79 SEG80 SEG80 SEG80 SEG80 SEG80 SEG81 SEG81 SEG81 SEG81 SEG81 SEG82...
  • Page 12 S1D10605 Series Units : µm PIN Name X BUMP Y BUMP S1D10605 S1D10606 S1D10607 S1D10608 S1D10609 Size Size DUMMY15 DUMMY23 DUMMY15 DUMMY20 DUMMY21 3328 –958 DUMMY16 DUMMY24 DUMMY16 DUMMY21 DUMMY22 3378 DUMMY17 DUMMY25 DUMMY17 DUMMY22 DUMMY23 3428 DUMMY18 DUMMY26 DUMMY18 DUMMY23 DUMMY24...

  • Page 13: Pin Descriptions

    S1D10605 Series 6. PIN DESCRIPTIONS Power Supply Pins No. of Pin Name Function Pins Power Shared with the MPU power supply terminal V Supply Power This is a 0V terminal connected to the system GND. Supply Power This is the reference power supply for the step-up voltage circuit for the Supply liquid crystal drive.
  • Page 14 This pin is connected to the RD signal of the 8080 MPU, and the S1D10605 series data bus is in an output status when this signal is LOW. • When connected to a 6800 Series MPU, this is active HIGH.
  • Page 15 This is the liquid crystal alternating current signal I/O terminal. M/S = HIGH: Output M/S = LOW: Input When the S1D10605 Series chip is used in master/slave mode, the various FR terminals must be connected. This is the liquid crystal display blanking control terminal.
  • Page 16 S1D10605 Series Liquid Crystal Drive Terminals No. of Pin Name Function Pins SEG0 These are the liquid crystal segment drive outputs. Through a combination of the contents of the display RAM and with the FR signal, a single level is...

  • Page 17: Function Description

    Selecting the Interface Type With the S1D10605 Series chips, data transfers are done through an 8-bit bi-directional data bus (D7 to D0) or through a serial data input (SI). Through selecting the P/S terminal polarity to the HIGH or LOW it is possible to select either parallel data input or serial data input as shown in Table 1.
  • Page 18 S1D10605 Series. Wait time may not be considered. And, in the S1D10605 Series chips, each time data is sent from the MPU, a type of pipeline process between LSIs is performed through the bus holder attached to the internal data bus.
  • Page 19 The Busy Flag When the busy flag is “1” it indicates that the S1D10605 Series chip is running internal processes, and at this time no command aside from a status read will be received. The busy flag is outputted to D7 pin with the read instruction. If the cycle time ( ) is maintained, it is not necessary to check for this flag before each command.
  • Page 20 S1D10608 and COM51 output for the S1D10609 Series when the common output mode is reversed. The display area is a 65 line area for the S1D10605 Series, a 49 line area for the S1D10606, a 33 line area for the S1D10607, a 55 line area for the S1D10608 and a 53 line area for the S1D10609 from the display start line address.
  • Page 21 S1D10605 Series When the Page Address Line common output Data Address Output mode is normal COM0 COM1 COM2 COM3 Page 0 COM4 COM5 COM6 COM7 COM8 COM9 COM10 COM11 Page 1 COM12 COM13 COM14 COM15 COM16 COM17 COM18 COM19 Page 2...
  • Page 22 S1D10605 Series The Display Data Latch Circuit The display data latch circuit is a latch that temporarily stores the display data that is output to the liquid crystal driver circuit from the display data RAM. Because the display normal/reverse status, display ON/OFF status, and display all points ON/OFF commands control only the data within the latch, they do not change the data within the display data RAM itself.
  • Page 23 S1D10605 Series When multiple S1D10605 Series chips are used, the slave chips must be supplied the display timing signals (FR, CL, DOF) from the master chip[s]. Table 5 shows the status of the FR, CL, and DOF signals. Table 5...
  • Page 24 S1D10605 Series COM0 COM1 COM2 COM3 COM4 COM5 COM0 COM6 COM7 COM8 COM1 COM9 COM10 COM11 COM12 COM2 COM13 COM14 COM15 SEG0 SEG1 SEG2 COM0–SEG0 ∞ –V –V –V –V –V COM0–SEG1 ∞ –V –V –V –V –V COM0–SEG0 ∞...
  • Page 25 The Step-up Voltage Circuits Using the step-up voltage circuits equipped within the S1D10605 Series chips it is possible to product a Quad step-up, a Triple step-up, and a Double step-up of the V – V voltage levels.
  • Page 26 V through the voltage regulator circuit. Because the S1D10605 Series chips have an internal high-accuracy fixed voltage power supply with a 64-level electronic volume function and internal resistors for the V voltage regulator, systems can be constructed without having to include high-accuracy voltage regulator circuit components.
  • Page 27 S1D10605 Series   ⋅   α     ⋅ ⋅ –     α − ⋅ (Equation A-1) (constant voltage supply + electronic volume) Internal Ra – Internal Rb Figure 8 is the IC-internal fixed voltage supply, and its voltage at Ta = 25°C is as shown in Table 9.
  • Page 28 V voltage by externally mounting Ra and Rb. Figs. 9 (for S1D10605 Series), Figs. 10 (for S1D10606 Series) Figs. 11 (for S1D10607 Series), Figs.12 (for S1D 10608 ) and Figs. 13 (for S1D10609 Series). show V...
  • Page 29 S1D10605 Series S1D10605D00B –16 –15 –14 1 1 1 –13 1 1 0 –12 1 0 1 –11 1 0 0 –10 0 1 1 –9 –8 0 1 0 –7 0 0 1 –6 0 0 0 –5 –4...
  • Page 30 S1D10605 Series –16 S1D10607D00B –15 –14 1 1 1 –13 1 1 0 –12 1 0 1 –11 1 0 0 –10 0 1 1 –9 0 1 0 –8 0 0 1 –7 0 0 0 –6 –5 The V voltage –4...
  • Page 31 S1D10605 Series –16 S1D10609D00B 1 1 1 –15 1 1 0 –14 –13 1 0 1 –12 –11 1 0 0 –10 0 1 1 –9 –8 0 1 0 –7 0 0 1 –6 –5 0 0 0 –4...
  • Page 32 S1D10605 Series (B) When an External Resistance is Used (i.e., The V Voltage Regulator Internal Resistors Are Not Used) (1) The liquid crystal power supply voltage V can also be set without using the V voltage regulator internal resistors (IRS terminal = LOW) by adding resistors Ra’...
  • Page 33 S1D10605 Series (C) When External Resistors are Used (i.e. The V Voltage Regulator Internal Resistors Are Not Used). (2) When the external resistor described above are used, adding a variable resistor as well makes it possible to perform fine adjustments on Ra’ and Rb’, to set the liquid crystal drive voltage V .
  • Page 34 V to the liquid crystal drive circuit. 1/9 bias or 1/7 bias for S1D10605 Series, 1/8 bias or 1/ 6 bias for S1D10606 Series, 1/6 bias or 1/5 bias for the S1D10607 Series 1/8 bias or 1/6 bias for S1D10608 Series and 1/8 bias or 1/6 bias for S1D10609 Series can be selected.
  • Page 35 S1D10605 Series Reference Circuit Examples Figure 17 shows reference circuit examples. 1 When used all of the step-up circuit, voltage regulating circuit and V/F circuit (1) When the voltage regulator internal resistor (2) When the voltage regulator internal resistor is used.
  • Page 36 S1D10605 Series 3 When the V/F circuit alone is used 4 When the built-in power is not used CAP3– CAP3– External CAP1+ CAP1+ power CAP1– CAP1– supply CAP2+ CAP2+ CAP2– CAP2– External power supply 5 When the built-in power circuit is used to drive a...
  • Page 37 S1D10605 Series * Precautions when installing the COG When installing the COG, it is necessary to duly consider the fact that there exists a resistance of the ITO wiring occurring between the driver chip and the externally connected parts (such as capacitors and resistors). By the influence of this resistance, non-conformity may occur with the indications on the liquid crystal display.
  • Page 38 S1D10605 Series The Reset Circuit When the RES input comes to the LOW level, these LSIs return to the default state. Their default states are as follows: Display OFF Normal display ADC select: Normal (ADC command D0 = LOW) Power control register: (D2, D1, D0) = (0, 0, 0)

  • Page 39: Command Description

    8. COMMAND DESCRIPTION The S1D10605 Series chips identify the data bus signals by a combination of A0, RD (E), WR (R/W) signals. Command interpretation and execution does not depend on the external clock, but rather is performed through internal timing only, and thus the processing is fast enough that normally a busy check is not required.
  • Page 40 S1D10605 Series (4) Column Address Set This command specifies the column address of the display data RAM shown in Figure 4. The column address is split into two sections (the higher 4 bits and the lower 4 bits) when it is set (fundamentally, set continuously). Each time the display data RAM is accessed, the column address automatically increments (+1), making it possible for the MPU to continuously read from/write to the display data.
  • Page 41 S1D10605 Series (8) ADC Select (Segment Driver Direction Select) This command can reverse the correspondence between the display RAM data column address and the segment driver output. Thus, sequence of the segment driver output pins may be reversed by the command. See the 7. Function Description “column address circuit”...
  • Page 42 S1D10605 Series • The sequence for cursor display Page address set Column address set Read/modify/write Dummy read Data read Data process Data write Change complete? Figure 18 (13) End This command releases the read/modify/write mode, and returns the column address to the address it was at when the mode was entered.
  • Page 43 S1D10605 Series (15) Common Output Mode Select This command can select the scan direction of the COM output terminal. For details, see the 7. Function Description in “Common Output Mode Select Circuit.” E R/W Selected Mode A0 RD WR D7 D6 D5 D4 D3 D2 D1 D0...
  • Page 44 S1D10605 Series • Electronic Volume Register Set By using this command to set six bits of data to the electronic volume register, the liquid crystal drive voltage V assumes one of the 64 voltage levels. When this command is input, the electronic volume mode is released after the electronic volume register has been set.
  • Page 45 S1D10605 Series • Static Indicator Register Set This command sets two bits of data into the static indicator register, and is used to set the static indicator into a blinking mode. E R/W A0 RD WR D7 D6 D5 D4 D3 D2 D1 D0...
  • Page 46 The S1D10605 series chips have a liquid crystal display blanking control terminal DOF. This terminal enters an LOW state when the power saver mode is launched. Using the output of DOF, it is possible to stop the function of an external power supply circuit.
  • Page 47 S1D10605 Series Table 16 Table of S1D10605 Series Commands Command Code Command Function Display ON/OFF LCD display ON/OFF 0: OFF, 1: ON Display start line set Display start address Sets the display RAM display start line address Page address set...

  • Page 48: Command Setting

    S1D10605 Series 9. COMMAND DESCRIPTION Instruction Setup: Reference (reference) (1) Initialization Note: With this IC, when the power is applied, LCD driving non-selective potentials V and V (SEG pin) and V and V (COM pin) are output through the LCD driving output pins SEG and COM. When electric charge is...
  • Page 49 S1D10605 Series When the built-in power is not being used immediately after turning on the power: Turn ON the V power keeping the RES pin = LOW. When the power is stabilized Release the reset state. (RES pin = HIGH)
  • Page 50 S1D10605 Series (2) Data Display End of initialization Function setup by command input (User setup) (2) Display start line set *9 (3) Page address set *10 (4) Column address set *11 Notes: Reference items Function setup by command input (User setup) *9: 8.
  • Page 51 S1D10605 Series Refresh It is recommended that the operating modes and display contents be refreshed periodically to prevent the effect of unexpected noise. Refresh sequence NOP command Set all commands to the ready state (Including default state setting.) Refreshing of DRAM Precautions on Turning off the power Observe Paragraph 1) as the basic rule.
  • Page 52 S1D10605 Series <Turning the power (V ) off : When command control is not possible.> ) are off.) → Power (V 2) Reset (The LCD powers (V ) OFF • Observe > • When < , an irregular display may occur.

  • Page 53: Absolute Maximum Ratings

    –40 to +85 Storage temperature –55 to +100 °C Bare chip –55 to +125 to V System (MPU) side S1D10605 Series side Figure 24 Notes and Cautions 1. The V to V and V are relative to the V = 0V reference.

  • Page 54: Dc Characteristics

    S1D10605 Series 11. DC CHARACTERISTICS = 3.0 V ± 10%, Ta = –40 to +85°C Unless otherwise specified, V = 0 V, V Table 18 Rating Applicable Item Symbol Condition Units Min. Typ. Max. Operating Recom- — Voltage (1) mended...
  • Page 55 S1D10605 Series Table 19 Rating Applicable Item Symbol Condition Units Min. Typ. Max. Input voltage With Quad –4.0 — –1.8 (Relative to V Supply Step-up (Relative to V –16.0 — — output voltage Circuit Voltage regulator V (Relative to V –16.0...
  • Page 56 S1D10605 Series • Dynamic Consumption Current (1), During Display, with the Internal Power Supply OFF Current consumed by total ICs when an external power supply is used. Table 20 Display Pattern OFF Ta = 25°C Rating Item Symbol Condition Units Notes Min.
  • Page 57 S1D10605 Series Table 23 Display Pattern Checker Ta = 25°C Rating Item Symbol Condition Units Notes Min. Typ. Max. 120 180 µA S1D10605 (2) V = 3.0 V, Quad step-up voltage. Normal Mode — ***** – V = –11.0 V High-Power Mode —...
  • Page 58 S1D10605 Series Reference Data 1 • Dynamic Consumption Current (1) During LCD Display Using an External Power Supply Conditions: Internal power supply OFF External power supply in use S1D10605/S1D10606 (–11.0V): – V = –11.0 V S1D10606 (–8.0V)/S1D10607/ S1D10608/S1D10609: – V = –8.0 V...
  • Page 59 S1D10605 Series Reference Data 2 • Dynamic Consumption Current (2) During LCD display using the internal power supply Conditions: Internal power supply ON S1D10605/S1D10606 (×4, –11.0V): 4× step-up voltage: V – V = –11.0 V S1D10606 (×3, –8.0V)/S1D10607/ S1D10605(–11V) S1D10608/S1D10609: 3×...
  • Page 60 S1D10605 Series Reference Data 3 • Dynamic Consumption Current (3) During access This figure indicates the consumption current while the checker pattern is constantly written through f S1D10605 If there is no access, then only (1) remains. S1D10606/S1D10608/S1D10609 Conditions: Internal power supply OFF,...
  • Page 61 *10 This is the internal voltage reference supply for the V voltage regulator circuit. In the S1D10605 Series chips, the temperature range can come in three types as V options: (1) approximately –0.05%/°C,...
  • Page 62 S1D10605 Series Timing Characteristics System Bus Read/Write Characteristics 1 (For the 8080 Series MPU) (CS2="1") CYCL8 CYCH8 CCLR CCLW WR, RD CCHR CCHW CCLR CCLW D0 to D7 (Write) ACC8 D0 to D7 (Read) Figure 31 Table 26 = 2.7 V to 3.6 V, Ta = –40 to +85°C )
  • Page 63 S1D10605 Series Table 27 = 2.4 V to 3.0 V, Ta = –40 to +85°C ) Rating Item Signal Symbol Condition Units Min. Max. Address hold time — Address setup time — System cycle time 1 — CYCL8 System cycle time 2 —...
  • Page 64 S1D10605 Series System Bus Read/Write Characteristics 2 (6800 Series MPU) (CS2="1") CYCH6 CYCL6 EWHR EWHW EWLR EWLW EWHR EWHW D0 to D7 (Write) ACC6 D0 to D7 (Read) Figure 32 Table 29 = 2.7 V to 3.6 V, Ta = –40 to +85°C )
  • Page 65 S1D10605 Series Table 30 = 2.4 V to 3.0 V, Ta = –40 to +85°C ) Rating Item Signal Symbol Condition Units Min. Max. Address hold time — Address setup time — System cycle time 1 — CYCH6 System cycle time 2 —...
  • Page 66 S1D10605 Series The Serial Interface (CS2="1") SCYC Figure 33 Table 32 = 2.7 V to 3.6 V, Ta = –40 to +85°C ) Rating Item Signal Symbol Condition Units Min. Max. Serial Clock Period — SCYC SCL HIGH pulse width —...
  • Page 67 S1D10605 Series Table 33 = 2.4 V to 3.0 V, Ta = –40 to +85°C ) Rating Item Signal Symbol Condition Units Min. Max. Serial Clock Period — SCYC SCL HIGH pulse width — SCL LOW pulse width — Address setup time —...
  • Page 68 S1D10605 Series Display Control Output Timing (OUT) Figure 34 Table 35 = 2.7 V to 3.6 V, Ta = –40 to +85°C) Rating Item Signal Symbol Condition Units Min. Typ. Max. FR delay time = 50 pF — Table 36 = 2.4 V to 3.0 V, Ta = –40 to +85°C)
  • Page 69 S1D10605 Series Reset Timing Internal During reset Reset complete status Figure 35 Table 38 = 2.7 V to 3.6 V, Ta = –40 to +85°C) Rating Item Signal Symbol Condition Units Min. Typ. Max. µs Reset time — — µs Reset LOW pulse width —...

  • Page 70: The Mpu Interface (Reference Examples)

    12. THE MPU INTERFACE (REFERENCE EXAMPLES) The S1D10605 Series can be connected to either 80 × 86 Series MPUs or to 6800 Series MPUs. Moreover, using the serial interface it is possible to operate the S1D10605 series chips with fewer signal lines.

  • Page 71: Connections Between Lcd Drivers (Reference Example)

    S1D10605 Series 13. CONNECTIONS BETWEEN LCD DRIVERS (REFERENCE EXAMPLE) The liquid crystal display area can be enlarged with ease through the use of multiple S1D10605 Series chips. Use a same equipment type. (1) S1D10605 (master) ↔ S1D10605 (slave) Output Input...

  • Page 72: Connections Between Lcd Drivers (Reference Examples)

    S1D10605 Series 14. CONNECTIONS BETWEEN LCD DRIVERS (REFERENCE EXAMPLES) The liquid crystal display area can be enlarged with ease through the use of multiple S1D10605 Series chips. Use a same equipment type, in the composition of these chips. (1) Single-chip Structure...

  • Page 73: Cautions

    2. No license to any intellectual property rights or any other warrants or rights pertaining to implementation is granted by this material. Examples of application indicated in this material are for referential purposes only, and Seiko Epson does not assume any liability of any kind regarding any inconveniences caused by applied circuits.

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S1d10605d00b000S1d10606d00b000S1d10607d00b000S1d10608d00b000S1d10609d00b000S1d10605d03b000 ... Show all

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