Advertisement
Section
II
Paragraphs 2-83 to 2-90
occurs on counts 6
and
0).
Gate
C
conducts
when
an
input pulse
is
present and transistors
B
and C are
both
turned
off
(count
4).
2-83.
OUTPUT. The
common
emitter amplifier in-
verts the
output and provides
the
voltage gain nec-
essary to drive the
5
MHz
counter assembly.
2-84.
50
MHZ READOUT ASSEMBLY
A18.
2-85.
GENERAL.
The
50
MHz readout
assembly
(A18)
receives
the
binary-coded decimal output
from
the
50MHzdecimal counter A17;
it
provides both
front-
panel
digital
display and amplified
binary-coded-
decimal
signals.
Circuit details are
shown
i.n the
schematic
diagram, Figure
7-14.
2-86.
AMPLIFIERS. Transistors
el
through eB are
arranged
in
four
pairs
(amplifiers
A, B, D,
and
C).
Each
amplifier pair
controls
a
pair
of
neon
lamps in
the display matrix (for
detailed discussion of digital
display see Paragraphs 2-33 through
2-35.
2-87.
AMPLIFIER OPERATION.
As
an
exampte
of
amplifier operation,
suppose
that the A input
became
relatively
negative, equivalent
to binary
"0",
conduc-
tion through
Q1
would
decrease, resulting in
a
rela-
tively
negative voltage at the
Q1
emitter
and a
rela-
tively
positive
voltage at the
Q1
collector,
thus
per-
mitting
the
A
neon
lamp
to light;
the
output
oflel,
coupled
to
Q2
by way of emitter resistor
R22
and
voltage
divider
R20-R21,
results in
conduction
of e2,
Model 5245L
the Q2
collector
voltage
therefore becomes relatively
negative, representing binary
"0",
and
is
supplied
as
the
A output.
Operation
is
reversed
upon
receipt
of
a
relatively
positive input (binary
"1")
and
results in
Iighting of the A
neon
lamp
and
supplying a
relatively
positive
A
output, representing binary
"1".
The
B
amplifier
(Q3-Q4), the D
amplifier
(Q5-Q6),
and
the
C
amplifier
(Q7-QB)
operate
in
a
similar
manner.
2-88.
INPUT
AMPLIFIER ASSEMBLY
A19.A2O
2-89.
Diodes CR2, CR6, CR4,
and CR?
together with
current source resistors
R25 and
R26
provides
two
Iow
voltage sources that function together with limiting
diodes
CRl
and CR3
to
provide
protection while main-
taining 1
megohm
input resistance
up
to
2.8
volts
peak-to-peak
(same
voltage as the
4
on
diodes).
Since
the
input resistance
of
the
limiting
diodes
in parallel
with
the
temperature matched
field effect transistor
(FET)
pair is
much
greater than
1
megohm, the input
resistance
is
determined
by the
resistors
in
the
attenuator A1.
2-90.
The LEVEL control supplies
a voltage
to
the
second
input without a gain change. Transistors
Q2A
and
Q3
are a standard feedback
pair
used
in differ-
ential
operation
with
feedback
pair
Q2B
and
Q4.
The
feedbackprovides small loading onthe source follow-
ers,
wide bandwidth, and stable
gain.
The
second
differential pair provides
gain
with
temperature sta-
bility
and
is
a current
source
to drive
the
twisted
pair
02349-1
o5245-B-5
A.
SOMHz
READOUT
AIPLI
FIIR
A
ATPLIFIER
8.
ATPLI
FIER
0.
AIPLI
FIER
c.
I
TO
SllHz
c0tJ
ilItR
B. 5OMHz
DECIMAL
COUNTER
2-L8
Figure
2-L6.
50
MHz
Readout
and
50
MHz Counter
Block Diagram
Advertisement
