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Model 53084
Theory of Operation
SECTION IX H
5308A 75 MHz TIMER/COUNTER
SUBSECTION IV
THEORY OF OPERATION
9H-4-1.
INTRODUCTION
9H-4-3,
CIRCUIT OPERATION
9H-4-4.
When plugged onto a 5300B mainframe, the
5308A can measure frequency, frequency ratio, period,
period average, time interval and time interval average.
Single-channel and two-channel totalize functions are
provided. The two-channel function-totalizes pulses on
Channel A during pulses on Channel B or between
pulses on Channel B. Each of these modes of operation is
described in the following paragraphs with the aid ofa
signal flow diagram. The input amplifiers are described
first, followed by a description of the ROM circuit that
controls
the operation
and
an
explanation
of the
automatic time base mode.
9H-4-7.
The Channel A input signal is applied to the
front-panel CHAN A connector through AC-DC switch
S9 when the switch is in the DC position or through
capacitor C6 when the switch is in the AC position. The
signal is attenuated by the attenuator circuit R3, R4, C4,
C5 when the ATTENUATORS
switch is in the X10
position. When the ATTENUATORS switch is in the X1
position the attenuator circuit is bypassed. The signal is
connected through SEP-CHK-COM B switch S6, when
the switch is in the SEP position, to the Channel A input
circuit.
9H-4-8.
An overload protection circuit, CR1-CR6 is
connected between the Channel A and Channel B in-
puts. Specifications for the overload protection are listed
in Table 9H-1-1. The associated circuitry provides +2.5V
and ~2.5V for the clipping diodes (CH), 2, 5 and 6) and for
the LEVEL A and LEVEL B controls.
9H-4-9.
The input to Channel A is applied to zero-
offset buffer Q2A-Q2B. The signal voltage at the gate of
Q2A appears atinput pin 6 of comparator U2B. Variable
resistor R27 provides a balance adjustment to null the
offset between the input and output of Q2.
9H-4-10.
Comparator U2B compares the output of (32
with the voltage from the LEVEL A control to provide a
digital output (logic 1 or logic 0) to exclusive OR gate
USB. Inductors L1 and L2 and capacitors C9 and C10
connected to U2B form a decoupling circuit to reduce the
effects of noise from the 5V power supply. The slope
switch for Channel A is connected to pin 5 of U3B. The
position of the slope switch determines whether the
positive or negative slope of the input waveform will
allow gate U3B to be active. The two outputs of USB are
complementary. One of the outputs is applied to U4A,
UAB and the other output is applied to U1B, UID.
9H-4-11.
The outputs of gate U3B are converted from
ECL levels to TTL levels by U4A, U4B and applied to the
remainder of the 5308A circuits which are TTL logic.
The outputs of gate U3B are also applied to comparators
U1B and U1D which control the illumination of the
trigger light indicators.
9H-4-12.
Comparators
UIB
and UID
use positive
feedback from the output through capacitor C20 and
resistor R58 to the input, to allow the comparators to
operate as a one-shot circuit. The diode-capacitor circuit
input CR11-C22 or CR12-C29 provides pulse stretching
to stretch pulse widths of a few nanoseconds to several
microseconds. A single transition of the input signal
will cause
the LED
trigger indicator DS1 to flash
momentarily.
When
the input frequency exceeds ap-
proximately 1 kHz, the trigger indicator will remain on.
This result occurs because both inputs (pin 4, UIB and
pin 10, U1D) are low, both outputs are high, transistor
Q8 is turned on and DS1 illuminates.
9H-4-13.
ROM (U26) Circuit
9H-4-14.
To control the different signal paths for each
particular measurement,
as shown in Figures 9H-4-2
through 9H-4-8, a system of combinational logic must be
used that is based on the function code. In addition, the
time base code is used in selecting the decimal point and
annunciators
(k,
u,
Hz,
etc),
as
well
as
the
measurement's resolution. Because many control lines
are needed, the 5308A uses a ROM (read only memory),
instead of controlling the logic directly from the front-
panel switches. The 16 output lines from the ROM reflect
the programmed logic states of a particular address in
the ROM. The front-panel switches combine to select the
ROM's addresses and, hence, the ROM's output states.
In addition to controlling the signal flow logic, the
ROMs outputs also drive the annunciator lines through
the U10 inverters. The remaining three ROM outputs go
9H-4-1
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