Table of Contents
Advertisement
XV-D1000
MB-61 (A/B LINE MEMORY) SCHEMATIC DIAGRAM (2/2)
1
|
2
|
3
4
|
5
|
6
7
8
9
[10
[ou
—Ref No. MB-61 BOARD : 7,000 Series —
MB-61
BOARD (2/2)
|
fos TREE
4 (ERO
2
aadaa
EE
=
-
ae
Pre
B
| | SE
=
ue
Hd
CE
Jaa
ggg
4
EEE
nas
[~————e
a
e
Cpe
c
3,
dsaddaddooteacoobacs st
SEs
BUPEQEG2 S258
SS e seg PER E5522
g
=a
es
=
ox &
ca
Bis
os
We
BS was
xn
2A
ce) xo
ovo
~
Tak
(3) PSAs
opt
D
AZ
L&) psaz
een
olfffira
may
CL
psa
vine &
3 ERC
ane
) sao
te ©
iz.
S
Ry
:
My
4
ate
te
3 mr
gee
4 CRCORT
eae ++
[oxy]
on
oo
olf Bho
wise FAC asys
xen
E
veo
&
orrs
a
(REMORY CONTROLLER)
opta
1 :BLACK
!
Re
7
'iat
ce
iS)
a Oe
e90 (&)
F
+—) 10
01
w
eo
mx
T
kK
)
scx
'oar
os
EB vex
mB
[eXYAl
m7
18@) vexr
=
vss ©)
LPHASE COMP.
8%
gee2252822
1
Ose
GEDIHEDIO
és
:
iii
7 GNE
iC
wR
me
3am
FY
e
eh
rolibur
oy
Lo (BETZ
To
za
04s1, 492
1 EZ
DIFF.
~<rve»—
D-LATCH
aS
ee
|
'
28
"ODE
HER EVER
NTSC:NOMT
°
at
Rese
emBe ica
HPAL
a
j
3
ye J ene
8
4
4
'
i)
Advertisement
Table of Contents
