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Functional Description - Motorola MC44302A Advanced Information

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Introduction
The MC44302A is an advanced high performance
multistandard IF system specifically designed for use with all
of the world's major television modulation techniques
including NTSC, PAL, and SECAM. This device performs the
function of intermediate frequency (IF) amplification,
automatic gain control (AGC), automatic frequency tuning
(AFT) and signal demodulation for transmitting systems that
use either positive or negative amplitude modulated video
along with frequency modulated (FM) or amplitude
modulated (AM) sound. The television designer is offered a
new level of circuit simplicity along with enhanced system
performance when compared to present day television IF
amplifiers. Numerous unique design techniques are
incorporated resulting in only a single tuned circuit
adjustment for a completely aligned video and sound IF
system with tuner AFT output. Special design attention was
given to enhance noise performance and to reduce
differential gain and phase distortion. Additional internal
circuitry is provided to meet the European Peritel socket
requirements along with a means for descrambling video
signals that use either or both amplitude modulated sync and
alternate line video inversion. A detailed block diagram of the
internal architecture is shown in Figure 19 and an operating
description of the major circuit blocks is given below.
IF Amplifier and AGC
The IF amplifier consists of four cascaded ac coupled gain
stages yielding an input sensitivity of 40 µV for a full video
output swing of 2.2 Vpp. This level of sensitivity allows the
use of a single IF block filter without incurring the additional
cost of a preamplifier. A quite acceptable level of signal to
noise performance is achievable by utilizing a tuner with a
gain of 33 dB to 36 dB combined with a low insertion loss
( 18 dB) surface acoustic wave (SAW) or passive block filter.
The first three stages of the IF amplifier are gain controlled to
provide an AGC range of 80 dB. This extended AGC range
enhances the signal handling capability, resulting in superior
differential phase and gain performance with a significant
reduction of intermodulation products. AGC of the first stage
is internally delayed so as to preserve the amplifier's low
noise figure characteristics.
An on–chip sync separator and horizontal phase–locked
loop oscillator is provided for noise immune AGC gating in
self contained applications where a horizontal scan signal
may not be available. A positive going sync source connected
to the Flyback/Video input at Pin 17 is used to lock the PLL
and generate an internal AGC keying pulse. The sync
separator allows direct use of the Negative Video output at
Pin 5 as a source for the keying pulse. If horizontal scan
circuitry is available, a positive going flyback pulse can also
be used to set the keying pulse.
A video signal and a reference level are required to
implement automatic gain control of the lF and tuner. The
video AGC reference is selected for a specific modulation
standard by the Video Mode Switch voltage setting at Pin 10;
refer to Table 2. With PAL 1, PAL 2, or NTSC mode selected,
a black level reference is established by AGC keying during
the tip of sync. With SECAM mode selected, a black level
reference is established by AGC keying during the back
porch. In order to correct for the inconsistent back porch level
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MC44302A

FUNCTIONAL DESCRIPTION

that is common between SECAM transmitters, a long time
constant non–keyed peak white reference level is also
established, and is used in conjunction with the black level
reference to control the video output level. The peak white
level is used in effect to slowly readjust the black level
reference threshold over a limited range of 10%. With this
dual reference approach, the accuracy associated with a
typical peak white detecting system is maintained without the
usual sacrifice of speed, thus allowing a quick AGC response
to airplane flutter and channel changes.
The tuner AGC control function consists of an RF AGC
delay adjustment at Pin 15 and an RF AGC output at Pin 13.
The delay adjustment sets the threshold where tuner gain
reduction is to begin. This usually corresponds to a signal
level of 1.0 mV to 2.0 mV at antenna input. The AGC output
is designed to control a reverse AGC type of tuner. As the
antenna signal level increases, the voltage at Pin 13
decreases, causing a gain reduction in the tuner. Since
Pin 13 is an NPN open collector output, an external pull–up
resistor must be added if one is not provided in the tuner.
Pin 13 is guaranteed to sink a minimum of 1.0 mA. Note that
when operating with a tuner that requires in excess of 5.6 V,
current will flow into Pin 13 due to conduction of the upper
internal clamp diode.
Carrier Regeneration
Carrier regeneration is attained by the use of a
phase–locked loop, thus enabling true synchronous
demodulation to be achieved with all of its advantages.
Following the IF amplifier and preceding the PLL phase
detector is a limiting amplifier designed to remove the
amplitude modulation that is present on the carrier. The
amplifier consists of two cascaded differential stages with
direct coupled feedback to set a closed loop gain of 40 dB.
This two stage approach has several distinct advantages
when compared to conventional integrated demodulators
that utilize a single stage limiter. With a two stage limiter, the
gain requirement to remove the video amplitude modulation
can be designed–in without the large voltage swings that are
required by a single stage limiter with equivalent gain. The
large voltage swings lead to poor differential phase and gain
performance, and consequently the need for an external
tuned circuit with two cross coupled limiting diodes. Use of
direct coupled feedback diminishes the effects of the
amplifier's input offset voltage which can be an additional
source for differential phase and gain errors. The
combination of low voltage swing per stage with dc feedback
eliminates the need for a tuned circuit at the output of the
limiter. This results in a significant component and alignment
cost savings as well as removing the necessity to pin out a
high level IF signal. This high level signal is a potential
radiation source that can result in IF instability at low signal
levels. The only problem of using the two stage limiter is the
potential for an additional static phase shift which will result in
a change of the demodulating angles at both the video and
sound demodulators inputs. This problem is solved by
placing an identical two stage limiter between the frequency
doubler output and the phase detector input. This adds an
identical amount of static phase shift to bring the
demodulating angles back to 0 and 90 .
9

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