Fujitsu MB3773 Datasheet page 24

Power supply monitor with watch-dog timer
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MB3773
C
T
Notes : This is an example application to limit upper frequency f
the microprocessor.
If the CK cycle sent from the microprocessor exceeds f
(The lower frequency has already been set using C
When a clock pulse such as shown below is sent to terminal CK, a short T
from reaching the CK input threshold level ( : = 1.25 V), and will cause a reset signal to be output.
The T
value can be found using the following formula :
1
CK waveform
C
voltage
2
Example : Setting C and R allow the upper
24
EXAMPLE 11: Circuit for Limiting Upper Clock Input Frequency
1
8
2
7
3
6
4
5
T
: = 0.3 C
R
1
2
2
where V
5 V, T
CC
T
2
T
3
T
1
C
0.01 F
0.1 F
R
2
R
=10 k
1
T
r1
C
2
of clock pulses sent from
H
, the circuit generates a reset signal.
H
.)
T
3.0 s, T
20 s
3
2
value to be set (See the table below).
T
1
R
10 k
10 k
V
(5 V)
CC
RESET
RESET
CK
GND
prevents C
voltage
2
2
T
1
30 s
300 s

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