Fujitsu MB90390 Series Manuals

Manuals and User Guides for Fujitsu MB90390 Series. We have 1 Fujitsu MB90390 Series manual available for free PDF download: Hardware Manual

Fujitsu MB90390 Series Hardware Manual (740 pages)

Brand: Fujitsu | Category: Controller | Size: 10.39 MB

Table of Contents
9
Chapter 1 Overview

29
- Product Overview
  30
- Features
  31
- Block Diagram of MB90V390H
  34
- Block Diagram of MB90V390HA/MB90V390HB
  35
- Block Diagram of MB90394HA/MB90F394H(A)
  36
- Pin Assignment
  37
- Package Dimensions
  40
- Pin Functions
  41
- Input-Output Circuits
  47
- Handling Device
  50
Chapter 2 Cpu

53
- Outline of the CPU
  54
- Memory Space
  55
- Memory Space Map
  58
- Linear Addressing
  60
- Bank Addressing Types
  61
- Multi-Byte Data in Memory Space
  63
- Registers
  64
- Accumulator (A)
  67
- User Stack Pointer (USP) and System Stack Pointer (SSP)
  68
- Processor Status (PS)
  69
- Program Counter (PC)
  72
- Register Bank
  73
- Prefix Codes
  75
- Interrupt Disable Instructions
  77
- Precautions for Use of "DIV A, Ri" and "DIVW A, Rwi" Instructions
  79
Chapter 3 Interrupts

81
Chapter 4 Delayed Interrupt

109
- Outline of Delayed Interrupt Module
  110
- Delayed Interrupt Register
  111
- Delayed Interrupt Operation
  112
Chapter 5 Clocks

113
Chapter 6 Clock Modulator

133
Chapter 7 Resets

153
- Resets
  154
- Reset Cause and Oscillation Stabilization Wait Times
  156
- External Reset Pin
  158
- Reset Operation
  159
- Reset Cause Bits
  161
- Status of Pins in a Reset
  164
Chapter 8 Low-Power Control Circuit

165
- Overview of Low-Power Consumption Mode
  166
- Block Diagram of the Low-Power Consumption Control Circuit
  169
- Low-Power Consumption Mode Control Register (LPMCR)
  171
- CPU Intermittent Operation Mode
  175
- Standby Mode
  176
- Sleep Mode
  177
- Time-Base Timer Mode
  179
- Stop Mode
  181
- Status Change Diagram
  184
- Status of Pins in Standby Mode and During Reset
  186
- Usage Notes on Low-Power Consumption Mode
  187
Chapter 9 Memory Access Modes

191
Chapter 10 I/O Ports

197
- I/O Ports
  198
- I/O Port Registers
  199
- Port Data Register
  200
- Data Direction Register
  202
- Analog Input Enable Register
  203
- Input Level Select Register
  204
Chapter 11 Time-Base Timer

205
- Outline of Time-Base Timer
  206
- Time-Base Timer Control Register
  207
- Operations of Time-Base Timer
  209
Chapter 12 Watchdog Timer

211
- Outline of Watchdog Timer
  212
- Watchdog Timer Operation
  215
Chapter 13 16-Bit I/O Timer

220
- Outline of 16-Bit I/O Timer
  220
- 16-Bit I/O Timer Registers
  222
- 16-Bit Free-Run Timer
  224
- Data Register
  225
- Control Status Register
  226
- 16-Bit Free-Run Timer Operation
  229
- Output Compare
  231
- Output Compare Register
  232
- Control Status Register of Output Compare
  233
- 16-Bit Output Compare Operation
  238
- Input Capture
  243
- Input Capture Register Details
  244
- 16-Bit Input Capture Operation
  249
Chapter 14 16-Bit Reload Timer (with Event Count Function)

251
Chapter 15 Watch Timer

265
- Outline of Watch Timer
  266
- Watch Timer Registers
  267
- Timer Control Register
  268
- Sub-Second Registers
  272
- Second/Minute/Hour Registers
  273
Chapter 16 8/16-Bit Ppg

275
Chapter 17 Dtp/External Interrupts

297
Chapter 18 8/10-Bit A/D Converter

308
Chapter 19 Uart0, Uart1

339
- Features of UART0, UART1
  340
- UART0, UART1 Block Diagram
  341
- UART0, UART1 Registers
  342
- Serial Mode Control Register (UMC)
  343
- Status Register (USR)
  345
- Input Data Register (UIDR) and Output Data Register (UODR)
  347
- Rate and Data Register (URD)
  348
- UART0, UART1 Operation
  350
- Baud Rate
  351
- Internal and External Clock
  354
- Transfer Data Format
  355
- Parity Bit
  356
- Interrupt Generation and Flag Set Timings
  357
- Flag Set Timings for a Receive Operation (Mode0, Mode1, Mode3)
  358
- Flag Set Timings for a Receive Operation (in Mode 2)
  359
- Flag Set Timings for a Transmit Operation
  360
- Status Flag During Transmit and Receive Operation
  361
- 19.10 UART0, UART1 Application Example
  362
Chapter 20 Uart2, Uart3

365
CHAPTER 21 400 Khz I 2 C INTERFACE

433
- I 2 C Interface Overview
  434
- I 2 C Interface Registers
  436
- Bus Status Register (IBSR)
  438
- Bus Control Register (IBCR)
  441
- Ten Bit Slave Address Register (ITBA)
  450
- Ten Bit Address Mask Register (ITMK)
  451
- C Seven Bit Slave Address Register (ISBA)
  453
- I 2 C Data Register (IDAR)
  455
- I 2 C Clock Control Register (ICCR)
  456
- Noise Filter Configuration Register (INFCR)
  459
- I 2 C Interface Operation
  460
- Programming Flow Charts
  463
Chapter 22 Serial I/O

465
- Outline of Serial I/O
  466
- Serial I/O Registers
  467
- Serial Mode Control Status Register (SMCS)
  468
- Serial Shift Data Register (SDR)
  472
- Serial I/O Prescaler (CDCR)
  473
- Serial I/O Operation
  474
- Shift Clock
  475
- Serial I/O Operation
  476
- Shift Operation Start/Stop Timing
  478
- Interrupt Function of the Extended Serial I/O Interface
  481
Chapter 23 Can Controller

483
Chapter 24 Stepping Motor Controller

549
Chapter 25 Sound Generator

561
- Outline of Sound Generator
  562
- Sound Generator Registers
  563
- Sound Generator Control Register
  564
- Frequency Data Register
  567
- Amplitude Data Register
  568
- Decrement Grade Register
  569
- Tone Count Register
  570
Chapter 26 Address Match Detection Function

571
Chapter 27 Rom Mirroring Module

579
- Outline of ROM Mirroring Module
  580
- ROM Mirroring Register (ROMM)
  581
Chapter 28 3M-Bit Flash Memory

583
Chapter 29 Examples of Serial Programming Connection

619
Appendix

633
APPENDIX A I/O Maps

634
APPENDIX B Instructions

649
- Instruction Types
  650
- Addressing
  651
- Direct Addressing
  653
- Indirect Addressing
  659
- Execution Cycle Count
  667
- Effective Address Field
  670
- How to Read the Instruction List
  671
- F 2 MC-16LX Instruction List
  674
- Instruction Map
  688
APPENDIX C Timing Diagrams in Flash Memory Mode

710

Fujitsu Categories

Air Conditioner

Laptop Server

Scanner

Storage

More Fujitsu Manuals

Fujitsu MB90390 Series Manuals

Fujitsu MB90390 Series Hardware Manual (740 pages)

Table of Contents

Chapter 1 Overview

Chapter 2 Cpu

Chapter 3 Interrupts

Chapter 4 Delayed Interrupt

Chapter 5 Clocks

Chapter 6 Clock Modulator

Chapter 7 Resets

Chapter 8 Low-Power Control Circuit

Chapter 9 Memory Access Modes

Chapter 10 I/O Ports

Chapter 11 Time-Base Timer

Chapter 12 Watchdog Timer

Chapter 13 16-Bit I/O Timer

Chapter 14 16-Bit Reload Timer (with Event Count Function)

Chapter 15 Watch Timer

Chapter 16 8/16-Bit Ppg

Chapter 17 Dtp/External Interrupts

Chapter 18 8/10-Bit A/D Converter

Chapter 19 Uart0, Uart1

Chapter 20 Uart2, Uart3

CHAPTER 21 400 Khz I 2 C INTERFACE

Chapter 22 Serial I/O

Chapter 23 Can Controller

Chapter 24 Stepping Motor Controller

Chapter 25 Sound Generator

Chapter 26 Address Match Detection Function

Chapter 27 Rom Mirroring Module

Chapter 28 3M-Bit Flash Memory

Chapter 29 Examples of Serial Programming Connection

Appendix

APPENDIX A I/O Maps

APPENDIX B Instructions

APPENDIX C Timing Diagrams in Flash Memory Mode

Related Products

Fujitsu Categories