Lba Low Register; Lba Mid Register; Sector Count Register; Status Register - Hitachi HTS542516K9SA00 Specifications

When 48-bit addressing commands are used, the "most recently written" content contains LBA Bits
16-23, and the "previous content" contains Bits 40-47. The 48-bit Address feature set is described in
"12.14 48-bit Address Feature Set".

11.8 LBA Low Register

This register contains Bits 0-7. At the end of the command, this register is updated to reflect the
current LBA Bits 0-7.
When 48-bit commands are used, the "most recently written" content contains LBA Bits 0-7, and the
"previous content" contains Bits 24-31.

11.9 LBA Mid Register

This register contains Bits 8-15. At the end of the command, this register is updated to reflect the
current LBA Bits 8-15.
When 48-bit addressing commands are used, the "most recently written" content contains LBA Bits
8-15, and the "previous content" contains Bits 32-39.
11.10

Sector Count Register

This register contains the number of sectors of data requested to be transferred on a read or write
operation between the host and the device. If the value in the register is set to 0, a count of 256
sectors (in 28-bit addressing) or 65,536 sectors (in 48-bit addressing) is specified.
If the register is zero at command completion, the command was successful. If not successfully
completed, the register contains the number of sectors which need to be transferred in order to
complete the request.
The contents of the register are defined otherwise on some commands. These definitions are given in
the command descriptions.
11.11

Status Register

7 6
BSY DRDY

Table 28 Status Register

This register contains the device status. The contents of this register are updated whenever an error
occurs and at the completion of each command.
If the host reads this register when an interrupt is pending, it is considered to be the interrupt
acknowledge. Any pending interrupt is cleared whenever this register is read.
If BSY=1, no other bits in the register are valid.
Bit Definitions
BSY Busy. BSY=1 whenever the device is accessing the registers. The host should not read or
write any registers when BSY=1. If the host reads any register when BSY=1, the contents of
the Status Register will be returned.
DRDY (RDY) Device Ready. RDY=1 indicates that the device is capable of responding to a command.
RDY will be set to 0 during power on until the device is ready to accept a command.
DF Device Fault. DF=1 indicates that the device has detected a write fault condition. DF is set to
0 after the Status Register is read by the host.
DSC Device Seek Complete. DSC=1 indicates that a seek has completed and the device head is
Status Register
5 4
DF DSC DRQ
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5K250 (SATA) OEM Specification
3 2
CORR IDX
1 0
ERR