Bcc Memory Map - Motorola M68CPU32BUG User Manual

INTERNAL RAM(1)
MCU
INTERNAL
MODULES
OPTIONAL FPCP(3)
PFB(4): U5
ALTERNATE MCU
INTERNAL MODULES
LOCATION
(see APPENDIX C)
OPTIONAL RAM/EPROM
PFB: U2 & U4
CPU32BUG EPROM
BCC: U4
OPTIONAL RAM
PFB: U1 & U3
TARGET RAM
BCC: U2 & U3
SYSTEM RAM
BCC: U2 & U3
(1) Consult the MCU device User's Manual.
(2) XXXBase address is user programmable. Internal MCU modules,
such as internal RAM, can be configured on power-up/reset by
using the Initialization Table (INITTBL) covered in Appendix C.
(3) Floating Point Coprocessor - MC68881/MC68882
(4) Platform Board
(5) Depends on the memory device type used.
M68CPU32BUG/D REV 1
XXX7FF(2)
XXX000
FFFFFF
FFF000
FFE800
800000
7FF000
110000 /120000(5)
100000
0E0000
020000
010000
003000
000000
Figure 1-2. BCC Memory Map
1-6
GENERAL INFORMATION
CPU32BUG
STACK
CPU32BUG
INTERNAL
VARIABLES
CPU32BUG VECTOR
TABLE
TARGET VECTOR
TABLE