Kenwood KC-Z1 Service Manual page 14

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3 7 63 1515 0
TMS
ICE interface mode selection (JTAG)
TDO
ICE interface data output (JTAG)
TDI
ICE interface data input (JTAG)
3-3. Operation Description
3-3-1. Power-on Sequence and Reset
To evade the collision of signals, the device sets all pro-
grammable bidirectional pins to the input mode for activa-
tion. For example, the serial ports in both groups A and B
are set to the slave mode during activation. The operation
mode must be set by a host controller so that it is suitable
for each system configuration until decoding is initiated.
Therefore, a CFG command is available.
During the power-on sequence or reset, the boot loader
of an internal ROM is first activated. The program in
EPROM is booted when the EPROM effective for
address 0X40000 is detected. The program executed
after booting can be specified by the data in EPROM.
When EPROM is not connected (any of lower-level data
TE
L 13942296513
pins D7 to DO is set high), the device jumps to the com-
mand processing routine of internal ROM so as to wait for
the command from the host. The succeeding data from
the host is processed in the same way as when it is boot-
ed from EPROM if the command sent from the host is
booted. The device jumps to the specified address when
downloading is completed.
3-3-2. External Interface Setting
The operation mode of a serial port and memory port is
set using a CFG command. Set the operation mode
according to the characteristics of ADC, DAC, DIR, and
SRAM to be connected. The parameters described below
can be set. The default value after reset is underlined.
- Input port attribute: Master/slave
- Input port protocol: Continuos S (non-frame synchro-
nization) /frame synchronization/word selection (12S
compatible)/word selection (left-justify)/word selec-
tion (right- justify)
- Output port attribute: Master/slave
- Output port clock signal source: Internal/external
- Output port clock frequency-division coefficient:
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WSB= SCKIN(256) / SCKIN(384)
- DAC type: 12S/left-justify/right-justify
- DAC word size: 16/18/20 bits
.
- External SRAM bit width: Narrow (8/9/10 bits)/wide
(16/18/20 bits)
- External SRAM speed: 0 wait/l wait
CIRCUIT DESCRIPTION
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y
i
8
3-3-3. Operation Mode
This device supports the operation modes below. For the
command and parameter that select each operation
mode, refer to the description of host commands in sec-
tion 4.
1) Pink noise
- Channel: Left, center, right, left surrounding, right sur-
rounding, and sub-woofer
2) PCM
- Speaker configuration: Monaural and stereo
3) Dolby pro-logic
Two channel PCM input
- Speaker configuration: Normal, wide, 3-stereo, and
phantom
- Surrounding delay: Delayed in units of 1 ms between 0
and 31 ms.
4) Dolby AC3 + pro-logic
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3 6 7 1 3
Two channel AC-3 stream
- Speaker configuration: Normal, wide, 3-stereo, and
phantom
- Surrounding delay: Delayed in units of 1 ms between 0
and 31 ms.
- Input data format: Normal and S/P DIF
- Measures against data error: Mute and block repeat
5) Dolby AC3
Two channel PCM input
- Down mixing: 3/2, 2/2, 3/1, 2/1, 3/0, 2/0, and 1/0
- Surrounding delay: Delayed in units of 1 ms between 0
and 31 ms.
- Center delay: Delayed in units of 1 ms between 0 and 5
ms.
- Dynamic range control
- Input data format: Normal and S/P DIF
- Measures against data error: Mute and block repeat
u163
3-3-4. Decoder Control
A decoder can be controlled as described below using a .
host command.
- Mute
- Stop
- Play
2 9 9 4 2 8
Pro Logic
decoder
ZR38500
1 5 0 5 8 2 9 9 4
2-channel
Pro Logic
AC-3
decoder
decoder
ZR38500
Six-channel
AC 3 decoder
ZR38500
m
co
9 9
Left
Right
Center
Surround
2 8 9 9
Left
Right
Center
Surround
Left
Right
Left surround
Right surround
Center
Surround