Program Shunt Module - Siemens Microfloppy FDD100-5 Operating And Maintenance Manual

be a minimum of 250 nanoseconds and a maximum of 2.1 microseconds. At 125 kHz, the clock
interval is 8 microseconds, while the c1ock-to-data or data-to-clock interval is 4 microseconds. The
write clock frequency should be held within
±.
0.5 percent. Write timing is shown in Figure 2-10.
STEP
....------------------------;5 l - S
- - - - - 5
WRITE DATA
--..:....-----.....;-j
~II
250 NSEC MIN.
r--
2.15,uSECMAX.
:·~~~~~C
--. . 1
~I
- 8,uSEC
.:t
40 NSEC
WRITE GATE
--.:..14------1-----------------~5
S
40MSEC~1
Figure 2-10. Write Timing
2.4.3.2 Composite Read Data (J1-30). This line furnishes previously recorded information to
the controller. Information is transmitted in the encoding scheme used without discriminating
between clock and data bits. Decoding of data is accomplished by the controller. Data and clock
pulse widths are 1 microsecond
±.
250 nanoseconds at the encoded frequency. Read timing is shown
in Figure 2-11.
2.5 PROGRAM SHUNT MODULE
Figure 2-12 shows the program shunt module with the program shunt installed. The module is
an IC socket located on the PWB near J1. The IC socket has seven sets of pin receptacles, while
the program shunt has six sets of pins. One set of pin receptacles at either end of the IC socket
is always unused.
2-12