Co- Processor; Boot Roms And Self-Test Leds; I/O Blls; Direct Memory Addressing - HP 340 Series Service Manual

Workstation's spu
Hide thumbs Also See for 340 Series:
Table of Contents

Advertisement

ICo-Processor
An MC68882 fioating--point co-processor is used to increase system performance when certain
floating-point math routines are part of the application. It implements the required IEEE
standard capabilities.
Floating-point instructions become part of the language of the CPU in its operation.
Boot ROMs and 5elf-Test LEOs
Two Boot ROMs whose instructions are executed by the CPU shortly after power up are used
on this processor board.
Eight Self .. Test LEDs are visible through a vertical slot in the rear panel. Different patterns of
on and off (ls and Os) correspond to binary or hexadecimal error codes. These codes help you
find out what's working and what is not.
Chapter 4 provides an in-depth explanation of the Boot ROM functions. Chapter 5 explains
the error codes and other troubleshooting processes.
1/0 Bus
A 32-bit asynchronous DIO-II bus is used between the processor board and most video/graphics
boards and the processor based interfaces. When the processor is not performing I/O cycles, it
does not need the DIO-II bus at all.
Several different subsystems reside on the bus and interact with each other by using various bus
signal lines. Interface select codes, addresses, and data are transmitted via this bus. Memory
read/write cycles between the CPU and memory boards occur on the DIO-II bus.
Two connectors on the processor board transfers this bus to the SPU backplane. All video
and graphics boards connect to this bus. When the DIO-I slot is installed, two SPU backplane
connectors attaches to the DIO-J backplane through two ribbon cables.
No provisions exist to expand this bus outside the SPU to bus expanders.
Direct Memory Addressing
DMA chip architecture is a compatible superset of the Series 300 HP 98620B DMA Controller
Card which is used with other Series 300 computers.
The chip is a Standard-Cell design
implemented in a CMOS process.
Functional Description
49

Advertisement

Table of Contents
loading

Table of Contents