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HP 27130B
Memory Interface Circuit (MIC)
The Memory Interface Circuit (MIC, see A31, 7
-1)
provides the following functions:
*
Controls the RAl\1 and EPROM memory circuits
*
Provides two programmable DMA channels (memory to I/O channel only)
*
Vectors backplane interrupts for the BIC
The MIC contains twelve programmable 8-bit registers (register 0 functions as a 3-bit register,
five bits are not used) for configuring the DMA channels and the interrupt vectors. Four regist-
ers (registers 1, 2, 6, and 7) are write only, the other eight registers have read/write capability.
The registers and their functions are described on the following pages.
Note that all register bits
are positive true logic functions unless otherwise specified.
Register 0 - MIC Configuration. The functions of the bits of register 0 (read/write) are as follows:
Bit 7
=
DM2 -
Bit 6
=
XNT -
Bit 5
=
DEND-
Bi ts 4 through 0 are not used.
Selects whether IRQ 1- or IRQ2 - is the DMA request sensed by
DMA channel B.
If DM2
=
1, IRQ2- is sensed If DM2
=
0, IRQ1- is sensed
External In terru pt Enable.
When XNT
=
1, the I1NT- line will be sensed as an interrupt by the
MIC interrupt control.
When this bit
=
1, the DEND- signal (pin 48 of the MIC) is disabled
(should be
0).
NOTE
1
All of the above bits are zeroed on reset.
Register 1 - DMA B Upper Byte of Memory Address.
Register 1 (write only) contains the upper
byte of the memory address used as a source/destination for DMA channel B. Note that this register is
not affected by reset.
Register 2 - DMA Lower Byte of Memory Address. Register 2 (write only) contains the lower byte
of the memory address used as a source/destination for DMA channel B. Note that this register is not
affected by reset.
3-25
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