Epson S1C17M01 Manuals

Manuals and User Guides for Epson S1C17M01. We have 1 Epson S1C17M01 manual available for free PDF download: Technical Manual

Epson S1C17M01 Technical Manual (242 pages)

CMOS 16-BIT SINGLE CHIP MICROCONTROLLER

Brand: Epson | Category: Microcontrollers | Size: 6.53 MB

Notational Conventions and Symbols in this Manual
3
Table of Contents
4
Overview
13
Features
13
Block Diagram
15
Pins
16
Pin Configuration Diagram (TQFP13-64PIN)
16
Pad Configuration Diagram (Chip)
17
Pin Descriptions
18
Power Supply, Reset, and Clocks
21
Power Generator (PWG)
21
Overview
21
Pins
21
Regulator Operation Mode
21
System Reset Controller (SRC)
22
Overview
22
Input Pin
22
Reset Sources
23
Initialization Conditions (Reset Groups)
23
Clock Generator (CLG)
23
Overview
23
Input/Output Pins
24
Clock Sources
24
Operations
26
Operating Mode
30
Initial Boot Sequence
30
Transition between Operating Modes
30
Interrupts
31
Control Registers
32
PWG V D1 Regulator Control Register
32
CLG System Clock Control Register
32
CLG Oscillation Control Register
33
CLG IOSC Control Register
34
CLG OSC1 Control Register
35
CLG Interrupt Flag Register
36
CLG Interrupt Enable Register
37
CLG FOUT Control Register
37
CPU and Debugger
39
Overview
39
CPU Core
40
CPU Registers
40
Instruction Set
40
Reading PSR
40
I/O Area Reserved for the S1C17 Core
40
Debugger
40
Debugging Functions
40
Resource Requirements and Debugging Tools
41
List of Debugger Input/Output Pins
41
External Connection
41
Control Register
42
MISC PSR Register
42
Debug RAM Base Register
42
Memory and Bus
43
Overview
43
Bus Access Cycle
43
Flash Memory
44
Flash Memory Pin
44
Flash Bus Access Cycle Setting
44
Flash Programming
45
Flash Security Function
45
Ram
45
Display Data RAM
46
System-Protect Function
49
Control Registers
49
MISC System Protect Register
49
MISC IRAM Size Register
49
FLASHC Flash Read Cycle Register
50
Interrupt Controller (ITC)
51
Overview
51
Vector Table
51
Vector Table Base Address (TTBR)
52
Initialization
53
Maskable Interrupt Control and Operations
53
Peripheral Circuit Interrupt Control
53
ITC Interrupt Request Processing
53
Conditions to Accept Interrupt Requests by the CPU
54
Nmi
54
Software Interrupts
54
Interrupt Processing by the CPU
54
Control Registers
55
MISC Vector Table Address Low Register
55
MISC Vector Table Address High Register
55
ITC Interrupt Level Setup Register X
55
O Ports (PPORT)
57
Overview
57
I/O Cell Structure and Functions
58
Schmitt Input
58
Over Voltage Tolerant Fail-Safe Type I/O Cell
58
Pull-Up/Pull-Down
58
CMOS Output and High Impedance State
59
Clock Settings
59
PPORT Operating Clock
59
Clock Supply in SLEEP Mode
59
Clock Supply in DEBUG Mode
59
Operations
59
Initialization
59
Port Input/Output Control
61
Interrupts
62
Control Registers
62
Px Port Data Register
62
Px Port Enable Register
63
Px Port Pull-Up/Down Control Register
63
Px Port Interrupt Flag Register
63
Px Port Interrupt Control Register
64
Px Port Chattering Filter Enable Register
64
Px Port Mode Select Register
64
Px Port Function Select Register
65
P Port Clock Control Register
65
P Port Interrupt Flag Group Register
66
Control Register and Port Function Configuration of this IC
67
P0 Port Group
67
P1 Port Group
68
P2 Port Group
68
P3 Port Group
69
P4 Port Group
70
P5 Port Group
71
Pd Port Group
72
Common Registers between Port Groups
72
Watchdog Timer (WDT)
73
Overview
73
Clock Settings
73
WDT Operating Clock
73
Clock Supply in DEBUG Mode
74
Operations
74
WDT Control
74
Operations in HALT and SLEEP Modes
74
Control Registers
75
WDT Clock Control Register
75
WDT Control Register
75
Real-Time Clock (RTCA)
77
Overview
77
Output Pin and External Connection
77
Output Pin
77
Clock Settings
78
RTCA Operating Clock
78
Theoretical Regulation Function
78
Operations
79
RTCA Control
79
Real-Time Clock Counter Operations
80
Stopwatch Control
80
Stopwatch Count-Up Pattern
80
Interrupts
81
Control Registers
82
RTC Control Register
82
RTC Second Alarm Register
83
RTC Hour/Minute Alarm Register
84
RTC Stopwatch Control Register
84
RTC Second/1Hz Register
85
RTC Hour/Minute Register
86
RTC Month/Day Register
87
RTC Year/Week Register
87
RTC Interrupt Flag Register
88
RTC Interrupt Enable Register
89
Supply Voltage Detector (SVD)
91
Overview
91
Input Pin and External Connection
92
Input Pin
92
External Connection
92
Clock Settings
92
SVD Operating Clock
92
Clock Supply in SLEEP Mode
92
Clock Supply in DEBUG Mode
93
Operations
93
SVD Control
93
SVD Operations
94
SVD Interrupt and Reset
94
SVD Interrupt
94
SVD Reset
95
Control Registers
95
SVD Clock Control Register
95
SVD Control Register
96
SVD Status and Interrupt Flag Register
97
SVD Interrupt Enable Register
98
16-Bit Timers (T16)
99
Overview
99
Input Pin
99
Clock Settings
100
T16 Operating Clock
100
Clock Supply in SLEEP Mode
100
Clock Supply in DEBUG Mode
100
Event Counter Clock
100
Operations
100
Initialization
100
Counter Underflow
101
Operations in Repeat Mode
101
Operations in One-Shot Mode
101
Counter Value Read
102
Interrupt
102
Control Registers
102
T16 Ch.n Clock Control Register
102
T16 Ch.n Mode Register
103
T16 Ch.n Control Register
103
T16 Ch.n Reload Data Register
104
T16 Ch.n Counter Data Register
104
T16 Ch.n Interrupt Flag Register
104
T16 Ch.n Interrupt Enable Register
105
Uart (Uart)
106
Overview
106
Input/Output Pins and External Connections
107
List of Input/Output Pins
107
External Connections
107
Input Pin Pull-Up Function
107
Output Pin Open-Drain Output Function
107
Clock Settings
107
UART Operating Clock
107
Clock Supply in SLEEP Mode
107
Clock Supply in DEBUG Mode
108
Baud Rate Generator
108
Data Format
108
Operations
109
Initialization
109
Data Transmission
109
Data Reception
110
Irda Interface
111
Receive Errors
112
Framing Error
112
Parity Error
113
Overrun Error
113
Interrupts
113
Control Registers
113
UART Ch.n Clock Control Register
113
UART Ch.n Mode Register
114
UART Ch.n Baud-Rate Register
115
UART Ch.n Control Register
115
UART Ch.n Transmit Data Register
116
UART Ch.n Receive Data Register
116
UART Ch.n Status and Interrupt Flag Register
116
UART Ch.n Interrupt Enable Register
117
Synchronous Serial Interface (SPIA)
119
Overview
119
Input/Output Pins and External Connections
120
List of Input/Output Pins
120
External Connections
120
Pin Functions in Master Mode and Slave Mode
121
Input Pin Pull-Up/Pull-Down Function
121
Clock Settings
121
SPIA Operating Clock
121
Clock Supply in DEBUG Mode
122
SPI Clock (Spiclkn) Phase and Polarity
122
Data Format
123
Operations
123
Initialization
123
Data Transmission in Master Mode
123
Data Reception in Master Mode
125
Terminating Data Transfer in Master Mode
126
Data Transfer in Slave Mode
126
Terminating Data Transfer in Slave Mode
128
Interrupts
128
Control Registers
129
SPIA Ch.n Mode Register
129
SPIA Ch.n Control Register
130
SPIA Ch.n Transmit Data Register
131
SPIA Ch.n Receive Data Register
131
SPIA Ch.n Interrupt Flag Register
131
SPIA Ch.n Interrupt Enable Register
132
C (I2C)
133
Overview
133
Input/Output Pins and External Connections
134
List of Input/Output Pins
134
External Connections
134
Clock Settings
135
I2C Operating Clock
135
Clock Supply in DEBUG Mode
135
Baud Rate Generator
135
Operations
136
Initialization
136
Data Transmission in Master Mode
137
Data Reception in Master Mode
139
10-Bit Addressing in Master Mode
141
Data Transmission in Slave Mode
142
Data Reception in Slave Mode
144
Slave Operations in 10-Bit Address Mode
146
Automatic Bus Clearing Operation
146
Error Detection
147
Interrupts
148
Control Registers
149
I2C Ch.n Clock Control Register
149
I2C Ch.n Mode Register
150
I2C Ch.n Baud-Rate Register
150
I2C Ch.n Own Address Register
150
I2C Ch.n Control Register
151
I2C Ch.n Transmit Data Register
152
I2C Ch.n Receive Data Register
152
I2C Ch.n Status and Interrupt Flag Register
152
I2C Ch.n Interrupt Enable Register
153
LCD Driver (LCD8A)
155
Overview
155
Output Pins and External Connections
156
List of Output Pins
156
External Connections
156
Clock Settings
156
LCD8A Operating Clock
156
Clock Supply in SLEEP Mode
157
Clock Supply in DEBUG Mode
157
Frame Frequency
157
LCD Power Supply
157
Internal Generation Mode
158
External Voltage Application Mode 1
158
External Voltage Application Mode 2
158
LCD Voltage Regulator Settings
158
LCD Voltage Booster Setting
159
LCD Contrast Adjustment
159
Operations
159
Initialization
159
Display On/Off
160
Inverted Display
160
Drive Duty Switching
160
Drive Waveforms
161
Partial Common Output Drive
163
N-Segment-Line Inverse AC Drive
163
Display Data RAM
163
Display Area Selection
163
Segment Pin Assignment
164
Interrupt
165
Control Registers
166
LCD8A Clock Control Register
166
LCD8A Control Register
166
LCD8A Timing Control Register
167
LCD8A Power Control Register
167
LCD8A Display Control Register
168
LCD8A Interrupt Flag Register
169
LCD8A Interrupt Enable Register
170
F Converter (RFC)
171
Overview
171
Input/Output Pins and External Connections
172
List of Input/Output Pins
172
External Connections
172
Clock Settings
173
RFC Operating Clock
173
Clock Supply in SLEEP Mode
173
Clock Supply in DEBUG Mode
173
Operations
173
Initialization
173
Operating Modes
174
RFC Counters
174
Converting Operations and Control Procedure
175
CR Oscillation Frequency Monitoring Function
177
Interrupts
177
Control Registers
178
RFC Ch.n Clock Control Register
178
RFC Ch.n Control Register
178
RFC Ch.n Oscillation Trigger Register
179
RFC Ch.n Measurement Counter Low and High Registers
180
RFC Ch.n Time Base Counter Low and High Registers
180
RFC Ch.n Interrupt Flag Register
181
RFC Ch.n Interrupt Enable Register
181
MR Sensor Controller (AMRC)
182
Overview
182
Input/Output Pins and External Connections
183
List of Input/Output Pins
183
External Connections
183
Clock Settings
184
AMRC Operating Clock
184
Clock Supply in SLEEP Mode
184
Clock Supply in DEBUG Mode
184
Operations
184
Initialization
184
Measurement Control and Operations
185
Pulse Output Function
187
Hysteresis Control Function
188
Interrupts
188
Control Registers
189
AMRC Clock Control Register
189
AMRC AFE Control Register
189
AMRC Pulse Control Register
190
AMRC Control Register
190
AMRC Normal Rotation Counter Register
192
AMRC Reverse/Stop Counter Register
192
AMRC Event Counter Ch.X Register
192
AMRC Unit Counter Compare Setting Register
193
AMRC Unit Counter Register
193
AMRC Status Register
193
AMRC Interrupt Flag Register
194
AMRC Interrupt Enable Register
195
Electrical Characteristics
196
Absolute Maximum Ratings
196
Recommended Operating Conditions
196
Current Consumption
197
Clock Generator (CLG) Characteristics
198
Flash Memory Characteristics
199
Input/Output Port (PPORT) Characteristics
200
Supply Voltage Detector (SVD) Characteristics
201
UART (UART) Characteristics
202
Synchronous Serial Interface (SPIA) Characteristics
202
I 2 C (I2C) Characteristics
203
LCD Driver (LCD8A) Characteristics
204
R/F Converter (RFC) Characteristics
206
MR Sensor Controller (AMRC) Characteristics
207
Basic External Connection Diagram
208
Package
209
Appendix A List of Peripheral Circuit Control Registers
210
Power Generator (PWG)
210
0X4380-0X438E UART (UART)
218
0X43C0-0X43D2 I
221
C (I2C)
221
0X5480-0X549E MR Sensor Controller (AMRC)
226
0Xffff90
227
Appendix B Power Saving
228
Operating Status Configuration Examples for Power Saving
228
Other Power Saving Methods
229
Appendix C Mounting Precautions
230
Appendix D Measures against Noise
232
Appendix E Initialization Routine
233
Revision History
235

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Epson S1C17M01 Technical Manual (242 pages)

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