Epson S1C17W12 Manuals

Manuals and User Guides for Epson S1C17W12. We have 1 Epson S1C17W12 manual available for free PDF download: Technical Manual

Epson S1C17W12 Technical Manual (321 pages)

CMOS 16-BIT SINGLE CHIP MICROCONTROLLER

Brand: Epson | Category: Microcontrollers | Size: 9.43 MB

Notational Conventions and Symbols in this Manual
3
Table of Contents
4
Overview
14
Features
14
Block Diagram
17
Pins
19
Pin Configuration Diagram (Package)
19
Pad Configuration Diagram (Chip)
23
Pin Descriptions
24
Power Supply, Reset, and Clocks
27
Power Generator (PWG2)
27
Overview
27
Pins
27
Operations
28
System Reset Controller (SRC)
30
Overview
30
Input Pin
30
Reset Sources
30
Initialization Conditions (Reset Groups)
31
Clock Generator (CLG)
32
Overview
32
Input/Output Pins
33
Clock Sources
33
Operations
36
Operating Mode
41
Initial Boot Sequence
41
Transition between Operating Modes
41
Interrupts
43
Control Registers
43
PWG2 Control Register
43
PWG2 Timing Control Register
44
PWG2 Interrupt Flag Register
44
PWG2 Interrupt Enable Register
44
CLG System Clock Control Register
44
CLG Oscillation Control Register
46
CLG IOSC Control Register
46
CLG OSC1 Control Register
47
CLG OSC3 Control Register
48
CLG Interrupt Flag Register
50
CLG Interrupt Enable Register
50
CLG FOUT Control Register
51
CLG Oscillation Frequency Trimming Register
52
CPU and Debugger
53
Overview
53
CPU Core
54
CPU Registers
54
Instruction Set
54
Reading PSR
54
I/O Area Reserved for the S1C17 Core
54
Debugger
54
Debugging Functions
54
Resource Requirements and Debugging Tools
55
List of Debugger Input/Output Pins
55
External Connection
55
Flash Security Function
56
Control Register
56
MISC PSR Register
56
Debug RAM Base Register
57
Memory and Bus
58
Overview
58
Bus Access Cycle
58
Flash Memory
59
Flash Memory Pin
59
Flash Bus Access Cycle Setting
59
Flash Programming
60
Ram
60
Display Data RAM
60
Peripheral Circuit Control Registers
61
System-Protect Function
64
Control Registers
64
MISC System Protect Register
64
MISC IRAM Size Register
65
FLASHC Flash Read Cycle Register
65
Interrupt Controller (ITC)
66
Overview
66
Vector Table
66
Vector Table Base Address (TTBR)
68
Initialization
68
Maskable Interrupt Control and Operations
68
Peripheral Circuit Interrupt Control
68
ITC Interrupt Request Processing
68
Conditions to Accept Interrupt Requests by the CPU
69
Nmi
69
Software Interrupts
69
Interrupt Processing by the CPU
69
Control Registers
70
MISC Vector Table Address Low Register
70
MISC Vector Table Address High Register
70
ITC Interrupt Level Setup Register X
70
O Ports (PPORT)
72
Overview
72
I/O Cell Structure and Functions
73
Schmitt Input
74
Over Voltage Tolerant Fail-Safe Type I/O Cell
74
Pull-Up/Pull-Down
74
CMOS Output and High Impedance State
74
LED Drive Pin
74
Clock Settings
75
PPORT Operating Clock
75
Clock Supply in SLEEP Mode
75
Clock Supply in DEBUG Mode
75
Operations
75
Initialization
75
Port Input/Output Control
77
Interrupts
78
Control Registers
78
Px Port Data Register
78
Px Port Enable Register
79
Px Port Pull-Up/Down Control Register
79
Px Port Interrupt Flag Register
80
Px Port Interrupt Control Register
80
Px Port Chattering Filter Enable Register
80
Px Port Mode Select Register
80
Px Port Function Select Register
81
P Port Clock Control Register
81
P Port Interrupt Flag Group Register
82
Control Register and Port Function Configuration of this IC
83
P0 Port Group
83
P1 Port Group
84
P2 Port Group
85
P3 Port Group
86
P4 Port Group
87
Pd Port Group
88
Common Registers between Port Groups
89
Universal Port Multiplexer (UPMUX)
90
Overview
90
Peripheral Circuit I/O Function Assignment
90
Control Registers
91
Pxy-Xz Universal Port Multiplexer Setting Register
91
Watchdog Timer (WDT2)
92
Overview
92
Clock Settings
92
WDT2 Operating Clock
92
Clock Supply in DEBUG Mode
92
Operations
93
WDT2 Control
93
Operations in HALT and SLEEP Modes
94
Control Registers
94
WDT2 Clock Control Register
94
WDT2 Control Register
95
WDT2 Counter Compare Match Register
96
Real-Time Clock (RTCA)
97
Overview
97
Output Pin and External Connection
97
Output Pin
97
Clock Settings
98
RTCA Operating Clock
98
Theoretical Regulation Function
98
Operations
99
RTCA Control
99
Real-Time Clock Counter Operations
100
Stopwatch Control
100
Stopwatch Count-Up Pattern
100
Interrupts
101
Control Registers
102
RTC Control Register
102
RTC Second Alarm Register
103
RTC Hour/Minute Alarm Register
104
RTC Stopwatch Control Register
104
RTC Second/1Hz Register
105
RTC Hour/Minute Register
106
RTC Month/Day Register
107
RTC Year/Week Register
107
RTC Interrupt Flag Register
108
RTC Interrupt Enable Register
109
Supply Voltage Detector (SVD)
111
Overview
111
Input Pin and External Connection
112
Input Pin
112
External Connection
112
Clock Settings
112
SVD Operating Clock
112
Clock Supply in SLEEP Mode
112
Clock Supply in DEBUG Mode
113
Operations
113
SVD Control
113
SVD Operations
114
SVD Interrupt and Reset
114
SVD Interrupt
114
SVD Reset
115
Control Registers
115
SVD Clock Control Register
115
SVD Control Register
116
SVD Status and Interrupt Flag Register
117
SVD Interrupt Enable Register
118
16-Bit Timers (T16)
119
Overview
119
Input Pin
119
Clock Settings
120
T16 Operating Clock
120
Clock Supply in SLEEP Mode
120
Clock Supply in DEBUG Mode
120
Event Counter Clock
120
Operations
120
Initialization
120
Counter Underflow
121
Operations in Repeat Mode
121
Operations in One-Shot Mode
121
Counter Value Read
122
Interrupt
122
Control Registers
122
T16 Ch.n Clock Control Register
122
T16 Ch.n Mode Register
123
T16 Ch.n Control Register
123
T16 Ch.n Reload Data Register
124
T16 Ch.n Counter Data Register
124
T16 Ch.n Interrupt Flag Register
124
T16 Ch.n Interrupt Enable Register
125
Uart (Uart2)
126
Overview
126
Input/Output Pins and External Connections
127
List of Input/Output Pins
127
External Connections
127
Input Pin Pull-Up Function
127
Output Pin Open-Drain Output Function
127
Input/Output Signal Inverting Function
127
Clock Settings
127
UART2 Operating Clock
127
Clock Supply in SLEEP Mode
128
Clock Supply in DEBUG Mode
128
Baud Rate Generator
128
Data Format
128
Operations
129
Initialization
129
Data Transmission
130
Data Reception
131
Irda Interface
132
Receive Errors
132
Framing Error
132
Parity Error
133
Overrun Error
133
Interrupts
133
Control Registers
134
UART2 Ch.n Clock Control Register
134
UART2 Ch.n Mode Register
134
UART2 Ch.n Baud-Rate Register
135
UART2 Ch.n Control Register
136
UART2 Ch.n Transmit Data Register
136
UART2 Ch.n Receive Data Register
136
UART2 Ch.n Status and Interrupt Flag Register
137
UART2 Ch.n Interrupt Enable Register
138
Synchronous Serial Interface (SPIA)
139
Overview
139
Input/Output Pins and External Connections
140
List of Input/Output Pins
140
External Connections
140
Pin Functions in Master Mode and Slave Mode
141
Input Pin Pull-Up/Pull-Down Function
141
Clock Settings
141
SPIA Operating Clock
141
Clock Supply in DEBUG Mode
142
SPI Clock (Spiclkn) Phase and Polarity
142
Data Format
143
Operations
143
Initialization
143
Data Transmission in Master Mode
143
Data Reception in Master Mode
145
Terminating Data Transfer in Master Mode
146
Data Transfer in Slave Mode
146
Terminating Data Transfer in Slave Mode
148
Interrupts
148
Control Registers
149
SPIA Ch.n Mode Register
149
SPIA Ch.n Control Register
150
SPIA Ch.n Transmit Data Register
151
SPIA Ch.n Receive Data Register
151
SPIA Ch.n Interrupt Flag Register
151
SPIA Ch.n Interrupt Enable Register
152
C (I2C)
153
Overview
153
Input/Output Pins and External Connections
154
List of Input/Output Pins
154
External Connections
154
Clock Settings
155
I2C Operating Clock
155
Clock Supply in DEBUG Mode
155
Baud Rate Generator
155
Operations
156
Initialization
156
Data Transmission in Master Mode
157
Data Reception in Master Mode
159
10-Bit Addressing in Master Mode
161
Data Transmission in Slave Mode
162
Data Reception in Slave Mode
164
Slave Operations in 10-Bit Address Mode
166
Automatic Bus Clearing Operation
166
Error Detection
167
Interrupts
168
Control Registers
169
I2C Ch.n Clock Control Register
169
I2C Ch.n Mode Register
170
I2C Ch.n Baud-Rate Register
170
I2C Ch.n Own Address Register
170
I2C Ch.n Control Register
171
I2C Ch.n Transmit Data Register
172
I2C Ch.n Receive Data Register
172
I2C Ch.n Status and Interrupt Flag Register
172
I2C Ch.n Interrupt Enable Register
173
16-Bit PWM Timers (T16B)
175
Overview
175
Input/Output Pins
176
Clock Settings
177
T16B Operating Clock
177
Clock Supply in SLEEP Mode
177
Clock Supply in DEBUG Mode
177
Event Counter Clock
177
Operations
178
Initialization
178
Counter Block Operations
179
Comparator/Capture Block Operations
182
TOUT Output Control
190
Interrupt
196
Control Registers
196
T16B Ch.n Clock Control Register
196
T16B Ch.n Counter Control Register
197
T16B Ch.n Max Counter Data Register
198
T16B Ch.n Timer Counter Data Register
198
T16B Ch.n Counter Status Register
199
T16B Ch.n Interrupt Flag Register
200
T16B Ch.n Interrupt Enable Register
201
T16B Ch.n Comparator/Capture M Control Register
202
T16B Ch.n Compare/Capture M Data Register
204
Sound Generator (SNDA)
205
Overview
205
Output Pins and External Connections
206
List of Output Pins
206
Output Pin Drive Mode
206
External Connections
206
Clock Settings
207
SNDA Operating Clock
207
Clock Supply in SLEEP Mode
207
Clock Supply in DEBUG Mode
207
Operations
207
Initialization
207
Buzzer Output in Normal Buzzer Mode
207
Buzzer Output in One-Shot Buzzer Mode
210
Output in Melody Mode
211
Interrupts
213
Control Registers
213
SNDA Clock Control Register
213
SNDA Select Register
214
SNDA Control Register
215
SNDA Data Register
215
SNDA Interrupt Flag Register
216
SNDA Interrupt Enable Register
217
IR Remote Controller (REMC2)
218
Overview
218
Input/Output Pins and External Connections
218
Output Pin
218
External Connections
219
Clock Settings
219
REMC2 Operating Clock
219
Clock Supply in SLEEP Mode
219
Clock Supply in DEBUG Mode
219
Operations
219
Initialization
219
Data Transmission Procedures
220
REMO Output Waveform
220
Continuous Data Transmission and Compare Buffers
222
Interrupts
223
Application Example: Driving el Lamp
224
Control Registers
224
REMC2 Clock Control Register
224
REMC2 Data Bit Counter Control Register
225
REMC2 Data Bit Counter Register
226
REMC2 Data Bit Active Pulse Length Register
227
REMC2 Data Bit Length Register
227
REMC2 Status and Interrupt Flag Register
227
REMC2 Interrupt Enable Register
228
REMC2 Carrier Waveform Register
228
REMC2 Carrier Modulation Control Register
229
LCD Driver (LCD4A)
230
Overview
230
Output Pins and External Connections
231
List of Output Pins
231
External Connections
231
Clock Settings
231
LCD4A Operating Clock
231
Clock Supply in SLEEP Mode
232
Clock Supply in DEBUG Mode
232
Frame Frequency
232
LCD Power Supply
232
Internal Generation Mode
233
External Voltage Application Mode 1
233
External Voltage Application Mode 2
233
LCD Voltage Regulator Settings
234
LCD Voltage Booster Setting
234
LCD Contrast Adjustment
234
Operations
234
Initialization
234
Display On/Off
235
Inverted Display
235
Drive Duty Switching
235
Drive Waveforms
235
Partial Common Output Drive
238
N-Segment-Line Inverse AC Drive
238
Display Data RAM
239
Display Area Selection
239
Segment Pin Assignment
239
Common Pin Assignment
239
Interrupt
246
Control Registers
246
LCD4A Clock Control Register
246
LCD4A Control Register
247
LCD4A Timing Control Register 2
247
LCD4A Power Control Register
248
LCD4A Display Control Register
249
LCD4A COM Pin Control Register 0
250
LCD4A Interrupt Flag Register
250
LCD4A Interrupt Enable Register
250
F Converter (RFC)
251
Overview
251
Input/Output Pins and External Connections
252
List of Input/Output Pins
252
External Connections
252
Clock Settings
253
RFC Operating Clock
253
Clock Supply in SLEEP Mode
253
Clock Supply in DEBUG Mode
253
Operations
253
Initialization
253
Operating Modes
254
RFC Counters
254
Converting Operations and Control Procedure
255
CR Oscillation Frequency Monitoring Function
257
Interrupts
257
Control Registers
258
RFC Ch.n Clock Control Register
258
RFC Ch.n Control Register
258
RFC Ch.n Oscillation Trigger Register
259
RFC Ch.n Measurement Counter Low and High Registers
260
RFC Ch.n Time Base Counter Low and High Registers
260
RFC Ch.n Interrupt Flag Register
261
RFC Ch.n Interrupt Enable Register
261
Multiplier/Divider (COPRO2)
262
Overview
262
Operation Mode and Output Mode
262
Multiplication
263
Division
264
Mac
266
Reading Operation Results
268
Electrical Characteristics
269
Absolute Maximum Ratings
269
Recommended Operating Conditions
269
Current Consumption
270
System Reset Controller (SRC) Characteristics
272
Clock Generator (CLG) Characteristics
272
Flash Memory Characteristics
275
Input/Output Port (PPORT) Characteristics
276
Supply Voltage Detector (SVD) Characteristics
277
UART (UART2) Characteristics
279
Synchronous Serial Interface (SPIA) Characteristics
279
I 2 C (I2C) Characteristics
280
LCD Driver (LCD4A) Characteristics
281
R/F Converter (RFC) Characteristics
283
Basic External Connection Diagram
285
Package
287
Appendix A List of Peripheral Circuit Control Registers
290
0X41B0 Flash Controller (FLASHC)
296
0X4200-0X42E2 I/O Ports (PPORT)
296
0X4380-0X438E UART (UART2) Ch.0
300
0X43C0-0X43D2 I 2 C (I2C) Ch.0
303
0X5200-0X520E UART (UART2) Ch.1
306
0Xffff90
311
Appendix B Power Saving
312
Operating Status Configuration Examples for Power Saving
312
Other Power Saving Methods
313
Appendix C Mounting Precautions
314
Appendix D Measures against Noise
317
Appendix E Initialization Routine
318
Revision History
320

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Epson S1C17W12 Technical Manual (321 pages)

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