Epson S1C17W18 Manuals

Manuals and User Guides for Epson S1C17W18. We have 1 Epson S1C17W18 manual available for free PDF download: Technical Manual

Epson S1C17W18 Technical Manual (357 pages)

CMOS 16-BIT SINGLE CHIP MICROCONTROLLER

Brand: Epson | Category: Microcontrollers | Size: 10.3 MB

Notational Conventions and Symbols in this Manual
3
Table of Contents
4
Overview
15
Features
15
Block Diagram
17
Pins
18
Pin Configuration Diagram (Package)
18
Pad Configuration Diagram (Chip)
21
Pin Descriptions
22
Power Supply, Reset, and Clocks
27
Power Generator (PWG2)
27
Overview
27
Pins
27
Operations
28
System Reset Controller (SRC)
30
Overview
30
Input Pin
30
Reset Sources
30
Initialization Conditions (Reset Groups)
31
Clock Generator (CLG)
32
Overview
32
Input/Output Pins
33
Clock Sources
33
Operations
35
Operating Mode
40
Initial Boot Sequence
40
Transition between Operating Modes
40
Interrupts
42
Control Registers
42
PWG2 Control Register
42
PWG2 Timing Control Register
43
PWG2 Interrupt Flag Register
43
PWG2 Interrupt Enable Register
43
CLG System Clock Control Register
44
CLG Oscillation Control Register
45
CLG IOSC Control Register
46
CLG OSC1 Control Register
46
CLG OSC3 Control Register
48
CLG Interrupt Flag Register
49
CLG Interrupt Enable Register
49
CLG FOUT Control Register
50
CLG Oscillation Frequency Trimming Register
51
CPU and Debugger
52
Overview
52
CPU Core
53
CPU Registers
53
Instruction Set
53
Reading PSR
53
I/O Area Reserved for the S1C17 Core
53
Debugger
53
Debugging Functions
53
Resource Requirements and Debugging Tools
54
List of Debugger Input/Output Pins
54
External Connection
54
Flash Security Function
55
Control Register
55
MISC PSR Register
55
Debug RAM Base Register
56
Memory and Bus
57
Overview
57
Bus Access Cycle
57
Flash Memory
58
Flash Memory Pin
58
Flash Bus Access Cycle Setting
58
Flash Programming
59
Ram
59
Display Data RAM
59
Peripheral Circuit Control Registers
60
System-Protect Function
65
Control Registers
65
MISC System Protect Register
65
MISC IRAM Size Register
65
FLASHC Flash Read Cycle Register
65
Interrupt Controller (ITC)
67
Overview
67
Vector Table
67
Vector Table Base Address (TTBR)
69
Initialization
69
Maskable Interrupt Control and Operations
69
Peripheral Circuit Interrupt Control
69
ITC Interrupt Request Processing
70
Conditions to Accept Interrupt Requests by the CPU
70
Nmi
70
Software Interrupts
70
Interrupt Processing by the CPU
71
Control Registers
71
MISC Vector Table Address Low Register
71
MISC Vector Table Address High Register
71
ITC Interrupt Level Setup Register X
71
O Ports (PPORT)
74
Overview
74
I/O Cell Structure and Functions
75
Schmitt Input
75
Over Voltage Tolerant Fail-Safe Type I/O Cell
75
Pull-Up/Pull-Down
75
CMOS Output and High Impedance State
76
Clock Settings
76
PPORT Operating Clock
76
Clock Supply in SLEEP Mode
76
Clock Supply in DEBUG Mode
76
Operations
76
Initialization
76
Port Input/Output Control
78
Interrupts
79
Control Registers
79
Px Port Data Register
79
Px Port Enable Register
80
Px Port Pull-Up/Down Control Register
80
Px Port Interrupt Flag Register
81
Px Port Interrupt Control Register
81
Px Port Chattering Filter Enable Register
81
Px Port Mode Select Register
81
Px Port Function Select Register
82
P Port Clock Control Register
82
P Port Interrupt Flag Group Register
83
Control Register and Port Function Configuration of this IC
84
P0 Port Group
84
P1 Port Group
85
P2 Port Group
86
P3 Port Group
87
P4 Port Group
88
P5 Port Group
89
P6 Port Group
90
P7 Port Group
91
P8 Port Group
92
Pd Port Group
93
Common Registers between Port Groups
94
Universal Port Multiplexer (UPMUX)
95
Overview
95
Peripheral Circuit I/O Function Assignment
95
Control Registers
96
Pxy-Xz Universal Port Multiplexer Setting Register
96
Watchdog Timer (WDT)
97
Overview
97
Clock Settings
97
WDT Operating Clock
97
Clock Supply in DEBUG Mode
98
Operations
98
WDT Control
98
Operations in HALT and SLEEP Modes
98
Control Registers
99
WDT Clock Control Register
99
WDT Control Register
99
Real-Time Clock (RTCA)
101
Overview
101
Output Pin and External Connection
101
Output Pin
101
Clock Settings
102
RTCA Operating Clock
102
Theoretical Regulation Function
102
Operations
103
RTCA Control
103
Real-Time Clock Counter Operations
104
Stopwatch Control
104
Stopwatch Count-Up Pattern
104
Interrupts
105
Control Registers
106
RTC Control Register
106
RTC Second Alarm Register
107
RTC Hour/Minute Alarm Register
108
RTC Stopwatch Control Register
108
RTC Second/1Hz Register
109
RTC Hour/Minute Register
110
RTC Month/Day Register
111
RTC Year/Week Register
111
RTC Interrupt Flag Register
112
RTC Interrupt Enable Register
113
Supply Voltage Detector (SVD)
115
Overview
115
Input Pin and External Connection
116
Input Pin
116
External Connection
116
Clock Settings
116
SVD Operating Clock
116
Clock Supply in SLEEP Mode
116
Clock Supply in DEBUG Mode
117
Operations
117
SVD Control
117
SVD Operations
118
SVD Interrupt and Reset
118
SVD Interrupt
118
SVD Reset
119
Control Registers
119
SVD Clock Control Register
119
SVD Control Register
120
SVD Status and Interrupt Flag Register
121
SVD Interrupt Enable Register
122
16-Bit Timers (T16)
123
Overview
123
Input Pin
123
Clock Settings
124
T16 Operating Clock
124
Clock Supply in SLEEP Mode
124
Clock Supply in DEBUG Mode
124
Event Counter Clock
124
Operations
124
Initialization
124
Counter Underflow
125
Operations in Repeat Mode
125
Operations in One-Shot Mode
125
Counter Value Read
126
Interrupt
126
Control Registers
126
T16 Ch.n Clock Control Register
126
T16 Ch.n Mode Register
127
T16 Ch.n Control Register
127
T16 Ch.n Reload Data Register
128
T16 Ch.n Counter Data Register
128
T16 Ch.n Interrupt Flag Register
128
T16 Ch.n Interrupt Enable Register
129
Uart (Uart)
130
Overview
130
Input/Output Pins and External Connections
131
List of Input/Output Pins
131
External Connections
131
Input Pin Pull-Up Function
131
Output Pin Open-Drain Output Function
131
Clock Settings
131
UART Operating Clock
131
Clock Supply in SLEEP Mode
131
Clock Supply in DEBUG Mode
132
Baud Rate Generator
132
Data Format
132
Operations
133
Initialization
133
Data Transmission
133
Data Reception
134
Irda Interface
135
Receive Errors
136
Framing Error
136
Parity Error
137
Overrun Error
137
Interrupts
137
Control Registers
137
UART Ch.n Clock Control Register
137
UART Ch.n Mode Register
138
UART Ch.n Baud-Rate Register
139
UART Ch.n Control Register
139
UART Ch.n Transmit Data Register
140
UART Ch.n Receive Data Register
140
UART Ch.n Status and Interrupt Flag Register
140
UART Ch.n Interrupt Enable Register
141
Synchronous Serial Interface (SPIA)
143
Overview
143
Input/Output Pins and External Connections
144
List of Input/Output Pins
144
External Connections
144
Pin Functions in Master Mode and Slave Mode
145
Input Pin Pull-Up/Pull-Down Function
145
Clock Settings
145
SPIA Operating Clock
145
Clock Supply in DEBUG Mode
146
SPI Clock (Spiclkn) Phase and Polarity
146
Data Format
147
Operations
147
Initialization
147
Data Transmission in Master Mode
147
Data Reception in Master Mode
149
Terminating Data Transfer in Master Mode
150
Data Transfer in Slave Mode
150
Terminating Data Transfer in Slave Mode
152
Interrupts
152
Control Registers
153
SPIA Ch.n Mode Register
153
SPIA Ch.n Control Register
154
SPIA Ch.n Transmit Data Register
155
SPIA Ch.n Receive Data Register
155
SPIA Ch.n Interrupt Flag Register
155
SPIA Ch.n Interrupt Enable Register
156
C (I2C)
157
Overview
157
Input/Output Pins and External Connections
158
List of Input/Output Pins
158
External Connections
158
Clock Settings
159
I2C Operating Clock
159
Clock Supply in DEBUG Mode
159
Baud Rate Generator
159
Operations
160
Initialization
160
Data Transmission in Master Mode
161
Data Reception in Master Mode
163
10-Bit Addressing in Master Mode
165
Data Transmission in Slave Mode
166
Data Reception in Slave Mode
168
Slave Operations in 10-Bit Address Mode
170
Automatic Bus Clearing Operation
170
Error Detection
171
Interrupts
172
Control Registers
173
I2C Ch.n Clock Control Register
173
I2C Ch.n Mode Register
174
I2C Ch.n Baud-Rate Register
174
I2C Ch.n Own Address Register
174
I2C Ch.n Control Register
175
I2C Ch.n Transmit Data Register
176
I2C Ch.n Receive Data Register
176
I2C Ch.n Status and Interrupt Flag Register
176
I2C Ch.n Interrupt Enable Register
177
16-Bit PWM Timers (T16B)
179
Overview
179
Input/Output Pins
180
Clock Settings
181
T16B Operating Clock
181
Clock Supply in SLEEP Mode
181
Clock Supply in DEBUG Mode
181
Event Counter Clock
181
Operations
182
Initialization
182
Counter Block Operations
183
Comparator/Capture Block Operations
186
TOUT Output Control
194
Interrupt
200
Control Registers
200
T16B Ch.n Clock Control Register
200
T16B Ch.n Counter Control Register
201
T16B Ch.n Max Counter Data Register
202
T16B Ch.n Timer Counter Data Register
202
T16B Ch.n Counter Status Register
203
T16B Ch.n Interrupt Flag Register
204
T16B Ch.n Interrupt Enable Register
205
T16B Ch.n Comparator/Capture M Control Register
206
T16B Ch.n Compare/Capture M Data Register
208
Sound Generator (SNDA)
209
Overview
209
Output Pins and External Connections
210
List of Output Pins
210
Output Pin Drive Mode
210
External Connections
210
Clock Settings
211
SNDA Operating Clock
211
Clock Supply in SLEEP Mode
211
Clock Supply in DEBUG Mode
211
Operations
211
Initialization
211
Buzzer Output in Normal Buzzer Mode
211
Buzzer Output in One-Shot Buzzer Mode
214
Output in Melody Mode
215
Interrupts
217
Control Registers
217
SNDA Clock Control Register
217
SNDA Select Register
218
SNDA Control Register
219
SNDA Data Register
219
SNDA Interrupt Flag Register
220
SNDA Interrupt Enable Register
221
IR Remote Controller (REMC2)
222
Overview
222
Input/Output Pins and External Connections
222
Output Pin
222
External Connections
223
Clock Settings
223
REMC2 Operating Clock
223
Clock Supply in SLEEP Mode
223
Clock Supply in DEBUG Mode
223
Operations
223
Initialization
223
Data Transmission Procedures
224
REMO Output Waveform
224
Continuous Data Transmission and Compare Buffers
226
Interrupts
227
Application Example: Driving el Lamp
228
Control Registers
228
REMC2 Clock Control Register
228
REMC2 Data Bit Counter Control Register
229
REMC2 Data Bit Counter Register
230
REMC2 Data Bit Active Pulse Length Register
231
REMC2 Data Bit Length Register
231
REMC2 Status and Interrupt Flag Register
231
REMC2 Interrupt Enable Register
232
REMC2 Carrier Waveform Register
232
REMC2 Carrier Modulation Control Register
233
LCD Driver (LCD8B)
234
Overview
234
Output Pins and External Connections
235
List of Output Pins
235
External Connections
235
Clock Settings
236
LCD8B Operating Clock
236
Clock Supply in SLEEP Mode
236
Clock Supply in DEBUG Mode
236
Frame Frequency
236
Internal Generation Mode
237
External Voltage Application Mode 1
237
External Voltage Application Mode 2
238
LCD Voltage Regulator Settings
238
LCD Voltage Booster Setting
238
LCD Contrast Adjustment
238
Operations
239
Initialization
239
Display On/Off
239
Inverted Display
240
Drive Duty Switching
240
Drive Waveforms
240
Partial Common Output Drive
244
N-Segment-Line Inverse AC Drive
244
Display Data RAM
244
Display Area Selection
244
Segment Pin Assignment
245
Common Pin Assignment
245
Interrupt
255
Control Registers
255
LCD8B Clock Control Register
255
LCD8B Control Register
256
LCD8B Timing Control Register 1
256
LCD8B Timing Control Register 2
257
LCD8B Power Control Register
257
LCD8B Display Control Register
258
LCD8B COM Pin Control Register 0
259
LCD8B Interrupt Flag Register
259
LCD8B Interrupt Enable Register
259
F Converter (RFC)
261
Overview
261
Input/Output Pins and External Connections
262
List of Input/Output Pins
262
External Connections
262
Clock Settings
263
RFC Operating Clock
263
Clock Supply in SLEEP Mode
263
Clock Supply in DEBUG Mode
263
Operations
263
Initialization
263
Operating Modes
264
RFC Counters
264
Converting Operations and Control Procedure
265
CR Oscillation Frequency Monitoring Function
267
Interrupts
267
Control Registers
268
RFC Ch.n Clock Control Register
268
RFC Ch.n Control Register
268
RFC Ch.n Oscillation Trigger Register
269
RFC Ch.n Measurement Counter Low and High Registers
270
RFC Ch.n Time Base Counter Low and High Registers
270
RFC Ch.n Interrupt Flag Register
271
RFC Ch.n Interrupt Enable Register
271
12-Bit A/D Converter (ADC12A)
272
Overview
272
Input Pins and External Connections
273
List of Input Pins
273
External Connections
273
Clock Settings
273
ADC12A Operating Clock
273
Sampling Time
273
Operations
274
Initialization
274
Conversion Start Trigger Source
274
Conversion Mode and Analog Input Pin Settings
275
A/D Conversion Operations and Control Procedures
275
Interrupts
277
Control Registers
277
ADC12A Ch.n Control Register
277
ADC12A Ch.n Trigger/Analog Input Select Register
278
ADC12A Ch.n Configuration Register
279
ADC12A Ch.n Interrupt Flag Register
280
ADC12A Ch.n Interrupt Enable Register
281
ADC12A Ch.n Result Register M
281
Temperature Sensor/Reference Voltage Generator (TSRVR)
282
Overview
282
Output Pin and External Connections
282
Output Pin
282
External Connections
283
Operations
283
Reference Voltage Setting
283
Temperature Sensor Setting
283
Control Registers
284
TSRVR Ch.n Temperature Sensor Control Register
284
TSRVR Ch.n Reference Voltage Generator Control Register
284
Multiplier/Divider (COPRO2)
285
Overview
285
Operation Mode and Output Mode
285
Multiplication
286
Division
287
Mac
289
Reading Operation Results
291
Electrical Characteristics
292
Current Consumption
293
System Reset Controller (SRC) Characteristics
295
Clock Generator (CLG) Characteristics
295
Flash Memory Characteristics
298
Input/Output Port (PPORT) Characteristics
298
UART (UART) Characteristics
300
Synchronous Serial Interface (SPIA) Characteristics
301
I 2 C (I2C) Characteristics
302
LCD Driver (LCD8B) Characteristics
302
R/F Converter (RFC) Characteristics
307
12-Bit A/D Converter (ADC12A) Characteristics
308
Temperature Sensor/Reference Voltage Generator (TSRVR) Characteristics
309
Basic External Connection Diagram
310
Package
312
Appendix A List of Peripheral Circuit Control Registers
315
0X41B0 Flash Controller (FLASHC)
321
0X4200-0X42E2 I/O Ports (PPORT)
321
0X43C0-0X43D2 I
330
C (I2C)
330
0X54C0-0X54C2 Temperature Sensor/Reference Voltage Generator (TSRVR)
344
0Xffff90
344
Appendix B Power Saving
345
Operating Status Configuration Examples for Power Saving
345
Other Power Saving Methods
346
Appendix C Mounting Precautions
347
Appendix D Measures against Noise
350
Revision History
354

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