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Fujitsu MB89950 Series Manuals
Manuals and User Guides for Fujitsu MB89950 Series. We have
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Fujitsu MB89950 Series manuals available for free PDF download: Hardware Manual
Fujitsu MB89950 Series Hardware Manual (318 pages)
F2MC-8L 8-BIT MICROCONTROLLER
Brand:
Fujitsu
| Category:
Computer Hardware
| Size: 4.87 MB
Table of Contents
Table of Contents
11
Chapter 1 Overview
15
MB89950/950A Series Features
16
MB89950/950A Series Product Range
18
Differences Among Products
20
Block Diagram of MB89950/950A Series
21
Mb89950/950A Series Block Diagram
21
Pin Assignment
22
Package Dimensions
24
Chapter 1 Overview
25
I/O Pins and Pin Functions
26
Chapter 2 Handling Devices
31
Notes on Handling Devices
32
Chapter 3 Cpu
35
Memory Space
36
Memory Space Structure
36
Memory Map
37
Special Areas
38
Storing 16-Bit Data in Memory
40
Storing 16-Bit Data in Ram
40
Storing 16-Bit Data on Stack
40
Storing 16-Bit Operands
40
Dedicated Registers
41
Condition Code Register (CCR)
43
Interrupt Acceptance Control Bit
44
Register Bank Pointer (RP)
46
General-Purpose Registers
47
Interrupts
49
Interrupt Level Setting Registers (ILR1, ILR2, ILR3)
50
Interrupt Processing
51
Multiple Interrupts
53
Interrupt Processing Time
54
Stack Operation During Interrupt Processing
55
Stack Operation at Start of Interrupt Processing
55
Stack Operation at Interrupt Return
55
Stack Area for Interrupt Processing
56
Resets
57
External Reset Pin
59
Reset Operation
60
Mode Pin
61
Mode Fetch
61
Oscillation Stabilization Delay Reset State
61
Pin States During Reset
62
Pin States after Reading Mode Data
62
Clocks
63
Clock Generator
65
Clock Controller
67
Oscillation Stabilization Delay Time
69
Main Clock Oscillation Stabilization Delay Time
69
Standby Mode (Low-Power Consumption)
71
Operating States in Standby Mode
72
Sleep Mode
73
Stop Mode
74
Standby Control Register (STBC)
75
State Transition Diagram
77
Notes on Using Standby Mode
79
Memory Access Mode
81
Single-Chip Mode
81
Mode Pin (Moda)
81
Mode Data
81
Memory Access Mode Selection Operation
82
Chapter 4 I/O Ports
83
Overview of I/O Ports
84
Port 0
86
Port 0 Pins
86
Port 0 Register
87
Port 0 Data Register (PDR0)
88
Operation of Port 0
89
Port 1
91
Port 1 Register
92
Port 1 Data Register (PDR1)
93
Operation of Port 1
94
Port 2
96
Port 2 Register
97
Port 2 Data Register (PDR2)
98
Operation of Port 2
99
Port 3
100
Port 3 Register
102
Port 3 Data Register (PDR3)
103
Operation of Port 3
104
Port 4
106
Port 4 Registers
107
Port 4 Registers (PDR4, DDR4)
108
Operation of Port 4
110
Program Example for I/O Ports
112
Chapter 5 Timebase Timer
113
Overview of Timebase Timer
114
Block Diagram of Timebase Timer
116
Timebase Timer Control Register (TBTC)
118
Timebase Timer Interrupt
120
Operation of Timebase Timer
121
Notes on Using Timebase Timer
123
Program Example for Timebase Timer
124
Chapter 6 Watchdog Timer
125
Overview of Watchdog Timer
126
Block Diagram of Watchdog Timer
127
Watchdog Timer Control Register (WDTC)
129
Operation of Watchdog Timer
130
Notes on Using Watchdog Timer
132
Program Example for Watchdog Timer
133
Chapter 7 8-Bit Pwm Timer
135
Overview of 8-Bit PWM Timer
136
Interval Timer Function (Square Wave Output Function)
136
Pwm Timer Function
137
Block Diagram of 8-Bit PWM Timer
138
Structure of 8-Bit PWM Timer
140
PWM Control Register (CNTR)
142
PWM Compare Register (COMR)
144
8-Bit PWM Timer Interrupts
145
Operation of Interval Timer Function
146
Operation of PWM Timer Function
148
States in each Mode During 8-Bit PWM Timer Operation
149
Notes on Using 8-Bit PWM Timer
151
Program Example for 8-Bit PWM Timer
152
Pulse Width Count Timer (Pwc)
155
Chapter 8 Pulse Width Count Timer (Pwc)
155
Overview of Pulse Width Count Timer
156
Pulse Width Measurement Function
157
Block Diagram of Pulse Width Count Timer
158
Structure of Pulse Width Count Timer
160
Pulse Width Count Timer Pin
160
Pulse Width Count Timer Interrupt Source
161
Pulse Width Count Timer Registers
161
PWC Pulse Width Control Register 1 (PCR1)
162
PWC Pulse Width Control Register 2 (PCR2)
164
PWC Reload Buffer Register (RLBR)
166
PWC Noise Filter Control Register (NCCR)
168
Pulse Width Count Timer Interrupts
169
Operation of Interval Timer Function
170
Operation of Pulse Width Measurement Function
173
Measuring Long Pulse Widths
174
Operation of Noise Filter Circuit
176
States in each Mode During Pulse Width Count Timer Operation
177
Notes on Using Pulse Width Count Timer
178
Program Example for Timer Function of Pulse Width Count Timer
179
Chapter 9 8-Bit Serial I/O
183
Overview of 8-Bit Serial I/O
184
Serial I/O Function
184
Block Diagram of 8-Bit Serial I/O
185
Structure of 8-Bit Serial I/O
187
Serial Mode Register (SMR)
190
Serial Data Register (SDR)
193
8-Bit Serial I/O Interrupts
194
Operation of Serial Output
195
Serial Output Operation
195
Operation of Serial Input
197
Serial Input Operation
197
States in each Mode During 8-Bit Serial I/O Operation
199
Notes on Using 8-Bit Serial I/O
202
Connection Example for 8-Bit Serial I/O
203
Program Example for 8-Bit Serial I/O
204
Chapter 10 Uart
207
Overview of UART
208
Uart Function
208
Structure of UART
213
UART Pins
216
UART Registers
218
Serial Mode Control Register 1 (SMC1)
219
Serial Rate Control Register (SRC)
221
Serial Status and Data Register (SSD)
223
Serial Status and Rate Register (Ssd)
223
Serial Input Data Register (SIDR)
225
Serial Output Data Register (SODR)
226
Serial Mode Control Register 2 (SMC2)
227
UART Interrupts
229
Transmit Interrupt
229
Receive Interrupt
229
Operation of UART
230
Operation of Mode 0, 1, 3
231
Transmit Operation
231
Receive Operation
232
Program Example for UART
234
Chapter 11 External Interrupt Circuit (Edge)
237
Overview of the External Interrupt Circuit
238
Block Diagram of the External Interrupt Circuit
239
Structure of the External Interrupt Circuit
240
External Interrupt Control Register (EIC)
242
External Interrupt Circuit Interrupts
244
Operation of the External Interrupt Circuit
245
Program Example for the External Interrupt Circuit
246
Chapter 12 Lcd Controller/Driver
247
Overview of LCD Controller/Driver
248
Block Diagram of LCD Controller/Driver
249
LCD Controller/Driver Internal Voltage Divider
251
LCD Controller/Driver External Voltage Divider
253
Structure of LCD Controller/Driver
255
Lcd Controller/Driver Ram
257
LCD Control Register (LCDR)
258
Segment Output Select Register (SEGR)
260
Display RAM
262
Operation of LCD Controller/Driver
264
Output Waveforms During LCD Controller/Driver Operation (1/2 Duty Ratio)
265
Output Waveforms During LCD Controller/Driver Operation (1/3 Duty Ratio)
268
Output Waveforms During LCD Controller/Driver Operation (1/4 Duty Ratio)
271
Program Example for LCD Controller/Driver
274
Appendix
277
APPENDIX A I/O Map
278
APPENDIX B Overview of Instructions
280
Overview of FMC-8L Instructions
281
Addressing
283
B.2 Addressing
283
Special Instructions
288
B.3 Special Instructions
288
Bit Manipulation Instructions (SETB, CLRB)
292
Read-Modify-Write Operation
292
F 2 MC-8L Instructions
293
Transfer Instructions
293
Arithmetic Instructions
295
Branch Instructions
298
Instruction Map
300
APPENDIX C Mask Options
301
APPENDIX D Programming Specifications for One-Time PROM and EPROM Microcontroller
303
Programming Specifications for One-Time PROM and EPROM Microcontrollers
304
Programming Yield and Erasure
307
Programming to the EPROM with Piggyback/Evaluation Device
308
APPENDIX E MB89950/950A Series Pin States
309
Index
311
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Fujitsu MB89950 Series Hardware Manual (110 pages)
Brand:
Fujitsu
| Category:
Microcontrollers
| Size: 0.63 MB
Table of Contents
Table of Contents
3
1 General
7
Features
7
Product Series
8
Table 1-1 Types and Functions of MB89950 Series of Microcontrollers
8
Block Diagram
9
Fig. 1.1 Block Diagram (MB89953)
9
Pin Assignment
10
Fig. 1.2 Pin Assignment of MB89953 and MB89P955 (QFP-64, Pitch: 0.65 MM)
10
Fig. 1.3 Pin Assignment of MB89PV950 (MQFP-64, Pitch: 0.8 MM)
11
Pin Description
12
Table 1-2 Pin Description
12
Table 1-3 Pin Description for External ROM
13
Fig. 1.4 I/O Circuits
14
Handling Devices
16
2 Hardware Configuration
17
Cpu
18
Memory Space
18
Fig. 2.1 Memory Space of MB89950 Series Microcontrollers
18
Table 2-1 Table of Reset and Interrupt Vectors
19
Arrangement of 16-Bit Data in Memory Space
20
Fig. 2.2 Arrangement of 16 Bit Data in Memory Space
20
Fig. 2.3 Arrangement of 16 Bit Data During Execution of Instruction
20
Internal Registers in CPU
21
Fig. 2.4 Structure of Processor Status
22
Fig. 2.5 Rule for Translating Real Addresses at General-Purpose Register Area
22
Fig. 2.6 Register Bank Configuration
23
Clock Control Block
24
Table 2-2 Operating Mode of Low-Power Consumption Modes
26
Table 2-3 Selection of Oscillation Stabilization Time
27
Table 2-4 Sources of Reset
29
Interrupt Controller
30
Fig. 2.7 Interrupt-Processing Flowchart
32
Peripherals
33
I/O Ports
33
Table 2-5 List of Port Functions
33
Fig. 2.9 Port
37
Fig. 2.10 Port 4
39
8-Bit PWM Timer (Timer 1)
40
Fig. 2.11 Timer Operation
43
Fig. 2.12 PWM Pulse Output
44
Pulse-Width Count Timer (Timer 2)
45
Fig. 2.13 Measurement of High Pulse Width
50
Fig. 2.14 Operation of Noise Clearing Circuit
51
Uart
52
Table 2-6 Operation Modes of UART
61
Fig. 2.15 RDRF Flag Set Timing
61
Fig. 2.16 ORFE Flag Set Timing
62
Fig. 2.17 TDRE Flag Set Timing
62
Fig. 2.18 Transfer Data Format (Synchronous Transfer)
62
Table 2-7 Clock Division Ratio
63
Table 2-8 Input Clock of Baud Rate Generator
63
Table 2-9 Selection of Baud Rate (When Dedicated Baud Rate Generate Used)
64
8-Bit Serial I/O
65
Fig. 2.19 Shift Start/Stop Timing
70
Fig. 2.20 Input/Output Shift Timing
70
External Interrupt
71
LCD Controller/Driver
74
Fig. 2.21 LCD Controller /Driver Block Diagram
74
Fig. 2.22 Example of Waveform at Pin Corresponding to the RAM Data for Display
79
Fig. 2.23 Example of Waveform at Pin Corresponding to the RAM Data for Display
80
Fig. 2.24 Example of Waveform at Pin Corresponding to the RAM Data for Display
81
Fig. 2.25 Connection Examples for Supply Power for Driving LCD
82
Fig. 2.26 Built-In Voltage Dividing Resistors
83
Time-Base Timer
84
Watchdog Timer Reset
86
3 Operation
88
Clock Pulse Generator
89
Fig. 3.1 Clock Pulse Generator
89
Reset
90
Reset Operation
90
Fig. 3.2 Outline of Reset Operation
90
Fig. 3.3 Reset Vector Structure
90
Reset Sources
91
Interrupt
92
Fig. 3.4 Interrupt-Processing Flowchart
92
Table 3-1 Interrupt Sources and Interrupt Vectors
93
Low-Power Consumption Modes
94
Table 3-2 Low-Power Consumption Mode at each Clock Mode
94
Pin States for Sleep, Stop and Reset
95
Pin States for Sleep, Stop, and Reset
95
Table 3-3 Pin State of MB89950
95
4 Instructions
96
Legend
97
Transfer Instructions
98
Operation Instructions
99
Branch Instructions
100
Other Instructions
101
F 2 MC-8L Family Instruction Map
102
5 Mask Options
103
Table 5-1 Mask Options
104
Table 5-2 Recommended Port/Segment Mask Option Combinations
104
Appendix
105
Appendix A I/O Map
106
Appendix B Writing EPROM
108
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