Philips P89LPC938 Manuals

Manuals and User Guides for Philips P89LPC938. We have 1 Philips P89LPC938 manual available for free PDF download: User Manual

Philips P89LPC938 User Manual

Philips P89LPC938 User Manual (139 pages)

single-chip microcontroller

Brand: Philips | Category: Microcontrollers | Size: 0.87 MB

Table of Contents

1 Introduction

3
- Pin Configuration
  3
- Pin Description
  5
- Special Function Registers
  10
- Memory Organization
  18
2 Clocks

19
- Enhanced CPU
  19
- Clock Definitions
  19
- Oscillator Clock (OSCCLK)
  19
- Low Speed Oscillator Option
  19
- Medium Speed Oscillator Option
  19
- High Speed Oscillator Option
  19
- Clock Output
  20
- On-Chip RC Oscillator Option
  20
- Watchdog Oscillator Option
  20
- External Clock Input Option
  21
- Oscillator Clock (OSCCLK) Wake-Up Delay
  22
- CPU Clock (CCLK) Modification: DIVM
  22
  - Register
    22
- Low Power Select
  22
3 A/D Converter

22
- General Description
  22
- A/D Features
  22
- A/D Operating Modes
  23
- Fixed Channel, Single Conversion Mode
  23
- Fixed Channel, Continuous Conversion Mode
  24
- Auto Scan, Single Conversion Mode
  24
- Auto Scan, Continuous Conversion Mode
  24
- Dual Channel, Continuous Conversion Mode
  25
- Single Step Mode
  25
- Conversion Mode Selection Bits
  25
- Conversion Start Modes
  26
- Timer Triggered Start
  26
- Start Immediately
  26
- Edge Triggered
  26
- Stopping and Restarting Conversions
  26
- Boundary Limits Interrupt
  26
- Clock Divider
  27
- I/O Pins Used with ADC Functions
  27
- Power-Down and Idle Mode
  27
4 Interrupts

30
- Interrupt Priority Structure
  31
- External Interrupt Pin Glitch Suppression
  31
5 I/O Ports

33
6 Power Monitoring Functions

38
- Brownout Detection
  38
- Power-On Detection
  40
- Power Reduction Modes
  40
7 Reset

43
- Reset Vector
  45
8 Timers 0 and 1

45
- Mode 0
  46
- Mode 1
  47
- Mode 2
  47
- Mode 3
  47
- Mode 6
  47
- Timer Overflow Toggle Output
  49
9 Real-Time Clock System Timer

50
10 Capture/Compare Unit (CCU)

53
- CCU Clock (CCUCLK)
  54
- CCU Clock Prescaling
  54
- Basic Timer Operation
  54
- Output Compare
  56
- Input Capture
  58
- PWM Operation
  59
- Alternating Output Mode
  60
- Synchronized PWM Register Update
  61
- Halt
  61
- PLL Operation
  61
- CCU Interrupt Structure
  62
11 Uart

65
- Mode 0
  65
- Mode 1
  65
- Mode 2
  66
- Mode 3
  66
- SFR Space
  66
- Baud Rate Generator and Selection
  66
- Updating the BRGR1 and BRGR0 Sfrs
  67
- Framing Error
  67
- Break Detect
  68
- More about UART Mode 0
  69
- More about UART Mode 1
  70
- More about UART Modes 2 and 3
  71
- Framing Error and RI in Modes 2 and 3 with SM2 = 1
  71
- Break Detect
  72
- Double Buffering
  72
- Double Buffering in Different Modes
  72
- Transmit Interrupts with Double Buffering Enabled (Modes 1, 2, and 3)
  72
- The 9Th Bit (Bit 8) in Double Buffering (Modes 1, 2, and 3)
  73
- Multiprocessor Communications
  74
- Automatic Address Recognition
  75
100 C Interface

76
- C Data Register
  77
- C Slave Address Register
  77
- C Control Register
  78
- C Status Register
  79
- C SCL Duty Cycle Registers I2SCLH and I2SCLL
  79
- C Operation Modes
  80
- Master Transmitter Mode
  80
- Master Receiver Mode
  81
- Slave Receiver Mode
  82
- Slave Transmitter Mode
  83
13 Serial Peripheral Interface (SPI)

90
- Configuring the SPI
  94
- Additional Considerations for a Slave
  95
- Additional Considerations for a Master
  95
- Mode Change on SS
  95
- Write Collision
  96
- Data Mode
  96
- SPI Clock Prescaler Select
  100
14 Analog Comparators

100
- Comparator Configuration
  100
- Internal Reference Voltage
  102
- Comparator Input Pins
  102
- Comparator Interrupt
  102
- Comparators and Power Reduction Modes
  102
- Comparators Configuration Example
  103
15 Keypad Interrupt (KBI)

104
16 Watchdog Timer (WDT)

105
- Watchdog Function
  105
- Feed Sequence
  106
- Watchdog Clock Source
  109
- Watchdog Timer in Timer Mode
  110
- Power-Down Operation
  111
- Periodic Wake-Up from Power-Down Without an External Oscillator
  111
17 Additional Features

111
- Software Reset
  112
- Dual Data Pointers
  112
18 Data EEPROM

112
- Data EEPROM Read
  113
- Data EEPROM Write
  114
- Hardware Reset
  114
- Multiple Writes to the DEEDAT Register
  114
- Sequences of Writes to DEECON and DEEDAT Registers
  114
- Data EEPROM Row Fill
  114
- Data EEPROM Block Fill
  115
19 Flash Memory

115
- General Description
  115
- Features
  115
- Flash Programming and Erase
  116
- Using Flash as Data Storage: IAP-Lite
  116
- In-Circuit Programming (ICP)
  120
- ISP and IAP Capabilities of the P89LPC938
  120
- Boot ROM
  120
- Power on Reset Code Execution
  120
- Hardware Activation of Boot Loader
  121
- In-System Programming (ISP)
  121
- Using the In-System Programming (ISP)
  122
- In-Application Programming (IAP)
  125
- IAP Authorization Key
  126
- Flash Write Enable
  126
- Configuration Byte Protection
  126
- IAP Error Status
  127
- User Configuration Bytes
  130
- User Security Bytes
  131
- Boot Vector Register
  132
- Boot Status Register
  132
20 Instruction Set

134
21 Disclaimers

137
22 Trademarks

137

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