Sharp 64LHP5000 Service Manual page 72

Rear projection hdtv
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64LHP5000
PROJECTOR UNIT
Pin No.
Pin Name
28
SCL
29
SDA
30
VSS D2
31
VDD D2
32
VDD A1
33
(R-Y)
34
VSS A1
35
VSS A2
36
(B-Y)
37
VDD A2
38
VSS A2
39
Y
40
VDD A3
41
CUR
42
VDD A4
43
C UV
44
REF L UV
Ë TDA8755T (SUB VIDEO ASSY: IC4703)
VIDEO A/D CONVERTER
» Pin Assignment
N.C.
1
REG1
2
INY
3
REG2
4
CLPY
5
6
V
CCA
INU
7
SDN
8
INV
9
AGND
10
CLPU
11
CLPV
12
13
REG3
CE
14
CLP
15
HREF
16
I/O
2
I
I
C-bus clock line
2
I
I
c-bus data line
Digital ground 2(0V)
+5V digital supply voltage 2
+5V analog supply voltage for buffer of DAC 1
O
± (R-Y) output signal (analog signal)
Analog ground 1(0V)
Analog ground 2(0V)
O
± (B-Y) output signal (analog colour-difference signal)
+5V analog supply voltage for buffer of DAC 2
Analog ground 3 (0V)
O
Y output signal (analog luminance signal)
+5V analog supply voltage for buffer of DAC 3
I
Current input for analog output buffers
Supply and reference voltage for the three DAC S
I
Capacitor for chrominance DAC S (high reference)
I
Low reference of chrominance DAC S (connected to VSS A1)
» Block Diagram
V
V
CCA
CCD
32
V
CCD
6
32
31
D7
SUPPLY AND REFERENCE
30
VOLTAGE REGULATOR
D6
29
D5
INY
3
28
D4
CLPY
5
D3
27
CLAMP
CLP
15
26
D2
LOGIC
25
D1
24
D0
INU
7
23
V
CCO
22
D'3
CLAMP
11
CLPU
U
21
D'2
CLAMP
20
D'1
CLPV
12
V
19
D'0
18
DGND
INV
9
CLK
17
Function
V
AGND DGND SDN
N.C.
CCO
8
23
10
18
1
TRACK
AND
CLAMP
HOLD
Y
COMPARATOR
16
TRACK
AND
HOLD
TRACK
DIGITAL
ANALOG
AND
MULTIPLEXER
MULTIPLEXER
HOLD
TRACK
COMPARATOR
AND
128
HOLD
72
REG1
REG2
REG3
2
4
13
8
24
8
8
TTL
8-bit
8-bit
I / O
ADC
PIPELINE
8
31
16
TIMING GENERATOR
14
17
2
19
2
U AND V
8
20
8-bit
TTL
DATA
2
ADC
I / O
21
ENCODER
2
22
TDA8755
D0
Y
D7
HREF
CE
CLK
D'0
V
D'1
D'2
U
D'3

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