Operand Address Addressing; Implied Addressing - NEC 78K/0 Series User Manual

3.2 Operand Address Addressing

The following methods are available to specify the register and memory (addressing) to undergo manipulation
during instruction execution.

3.2.1 Implied addressing

[Function]
This addressing automatically specifies the address of the registers that function as an accumulator (A and
AX) in the general-purpose register area.
Of the 78K/0 Series instruction words, the following instructions employ implied addressing.
Instruction
MULU A register for multiplicand and AX register for product storage
DIVUW AX register for dividend and quotient storage
ADJBA/ADJBS A register for storage of numeric values targeted for decimal correction
ROR4/ROL4 A register for storage of digit data that undergoes digit rotation
[Operand format]
Because implied addressing can be automatically employed with an instruction, no particular operand format
is necessary.
[Description example]
In the case of MULU X
With an 8-bit x 8-bit multiply instruction, the product of the A register and X register is stored in AX. In this
example, the A and AX registers are specified by implied addressing.
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CHAPTER 3 ADDRESSING
Register to Be Specified by Implied Addressing
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