Huawei ADF10S48B Technical Manual page 17

Ac-dc converter
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ADF10S48B
AC-DC Converter Technical Manual V1.1
PMBus Communication
The module communicates with the system over
the PMBus. The following table describes the
PMBus address.
R (ADDR Pull-Down Resistor) Address
Left open
200 kΩ
174 kΩ
150 kΩ
124 kΩ
100 kΩ
75 kΩ
49.9 kΩ
24.9 kΩ
Ground
The address bit is as follows.
Bit
7
6
5
4
-
Address
Monitoring and Fault Detection
The module communicates with the system over
the PMBus. It provides the monitoring and fault
detection functions.
The module monitors the following:
 Module information
 Input voltage
 Input power
 Output voltage
 Output power
 Baseplate temperature
 CNT (On/Off)
The module detects and reports the following:
 Input faults
 Output overvoltage
 Output overcurrent
 Baseplate overtemperature
GLOBAL ENERGY EFFICIENCY SPECIALIST
Invalid
0x5F
0x5E
0x5D
0x5C
0x5B
0x5A
0x59
0x58
Invalid
3
2
1
0
Read/Write
SCL and SDA
Within the PSU, the SCL and SDA are each
connected to a pull-up resistor. Externally, the
SCL and SDA are connected to the system
through the fault isolation circuit.
SCL
SDA
Figure 35: Interconnect diagram of SCL and SDA
PMBus Timing
The module supports both 100 kHz (default) and
400 kHz clock rates.
T
is the duration for which SDA keeps its value
set
unchanged before SCL increases. T
duration for which SDA keeps its value unchanged
after SCL decreases.
Communication will fail if parameter values are
not consistent with those provided in the
following table. Figure 36 shows the timing
diagram of the PMBus interface.
Parameter
Logic input low (V
)
IL
Logic input high (V
)
IH
Logic output low (V
)
OL
Logic output high (V
OH
PMBus setup time
PMBus hold-up time
Clock/Data fall time (t
) 20+
f
Clock/Data rise time (t
Total capacitance of
one bus line (Cb)
17
3.3 V
3.3 kΩ
3.3 kΩ
MCU
is the
hold
Min.
Typ. Max. Unit
-
-
1.1
V
2.1
-
-
V
-
-
0.25 V
) 2.7
-
-
V
100
-
-
ns
0
-
-
ns
-
300 ns
0.1Cb
)
-
300 ns
r
-
-
400 pF

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