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Œ
Data transmission
SDA Bus activity - memory addressing
To start communication between the bus master and the slave IC the master must initiate a start
condition. Following this, the master sends onto the SDA bus line 8 bits (MSB first) corresponding to
the device address (7bits) plus a READ / WRITE bit. The slave IC acknowledges this and wait for a
byte address. After receipt of the byte address the device again responds with an acknowledge. The
next byte is the transmitted data.
In case of EEPROM, the four most significant bits of the device address are the device type identifier
corresponding to the 12C bus definition. For these memories the four bits are fixed as 1 0I0b. The
following three bits identify the specific memos bank on the bus ( 3 bits = 8 banks ). the Byte address
of 8 bits provides access to 256 bytes of the memory ( 256 bytes = 2 K bits ). Thus up to 8 X 2K bits
memories can be connected on the same bus giving a total memory capacity of 16 K bits
A
A
2
1
1 0 1 0
A2 =
Chip add
Device
A1-A0=
type
Bank add
Address
Read /
Write
Slave Address
Master sends read
request to slave
Master transmitter
to
slave receiver
Œ
bus stop
Pin 2 (Bus stop) of microcontroller is pull up to 5V externally by resistors. When this pin is shorted to
around and the TV is in " service mode" the microcontroller release the bus. External master device
can then control the bus and the slave devices (TDA8844 and EEPROM).
A
A
R
Word Address
C
0
W
K
A
A
A
A
A
A
A
A
0
7
6
5
4
3
2
1
0
Master writes word
address to slave
Master transmitter
to
slave receiver
2
Fig. 16: I
C bus memory addressing
A
A
Data Byte n
C
C
K
K
D
D
D
D
D
D
D
D
D
7
6
5
4
3
2
1
0
7
Master writes
data to slave
Master transmitter
to
slave receiver
23
3DQDVRQLF
A
Data Byte n+1
C
K
D
D
D
D
D
D
D
6
5
4
3
2
1
0
Master writes
data to slave
Master transmitter
to
slave receiver
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