Sony HSR-1 Service Manual page 24

IC
TC74VHC32FT(EL) (TOSHIBA)
C-MOS QUAD 2-INPUT OR GATES
—TOP VIEW—
14 13 12 11 10 9
V
DD
1 2 3 4 5 6
TC74VHC541F (TOSHIBA)
TC74VHC541F(EL)
TC74VHC541FT(EL) (TOSHIBA)
TC74VHCT541AF(EL) (TOSHIBA)
TC74VHCT541AFT(EL) (TOSHIBA)
C-MOS BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
—TOP VIEW—
G2
Y1 Y2 Y3 Y4
20 19 18 17 16 15
V
DD
1 2 3 4 5 6
G1
A1 A2 A3 A4 A5
G1 G2
A Y
0 0
G1
G2 0 0
1 x
x 1
TC74VHC574F (TOSHIBA)
TC74VHC574F(EL)
TC74VHCT574AF(EL) (TOSHIBA)
C-MOS 3-STATE D-TYPE EDGE-TRIGGERED FLIP-FLOP
—TOP VIEW—
EN
1 V 20
IN DD
D1 2 19 Q1
IN
D2 3 18 Q2
IN
D3 4 17 Q3
IN
D4 5 16 Q4
IN
D5 6 15 Q5
IN
D6 7 14 Q6
IN
D7 8 13 Q7
IN
D8 9 12 Q8
IN
10 GND 11 CK
D1 Q1 D2 Q2 D3
2 19 3 18 4 17
D Q
Q
EN
11
CK
1
EN
7-18
8
A
A
Y = Y
B
B
Y = A + B = A • B
A B Y
0 0 0
0 1 1
GND
1 0 1
7
1 1 1
0 : LOW LEVEL
1 : HIGH LEVEL
Y5 Y6 Y7 Y8
14 13 12 11
18
2
Y1
A1
3 17
A2 Y2
4 16
A3 Y3
5 15
Y4
A4
6 14
A5 Y5
13
7
A6 Y6
8 12
A7 Y7
GND
9 11
A8 Y8
7 8 9 10
G1 G2
1 19
A6 A7 A8
A Y
0 0
0 : LOW LEVEL
1 1
1 : HIGH LEVEL
x HI-Z
x : DON'T CARE
x HI-Z
HI-Z : HIGH IMPEDANCE
EACH FLIP-FLOP
2 19
D1 Q1
INPUTS
3 18
D2 Q2
EN CK
4 17
D3 Q3
0
OUT 5 16
D4 Q4
0
6 15
D5 Q5
0
OUT 7 14
D6 Q6
1 x
8 13
D7 Q7
OUT 9 12
0 : LOW LEVEL
D8 Q8
11
1 : HIGH LEVEL
OUT EN
x : DON'T CARE
HI-Z : HIGH IMPEDANCE
1
OUT
Q : NONSTABLE
0
OUT
OUT
OUT
IN
Q3 D4 Q4 D5 Q5 D6 Q6 D7 Q7 D8
5 16 6 15 7 14 8 13 9 12
D Q
Q
EN
TC74VHC74FT(EL) (TOSHIBA)
C-MOS DUAL D-TYPE FLIP-FLOPS WITH DIRECT SET/RESET
—TOP VIEW—
14 13 12
V
DD
Q Q
S R
D
D
D
1 2 3
4
S
2 D 5
D Q
3
6
Q
R
D
1
TC7S08FU(TE85R) (TOSHIBA)
TC7SET08F(TE85L) (TOSHIBA)
TC7SET08FU(TE85R)
TC7SH08FU-TE85R (TOSHIBA)CHIP PACKAGE
C-MOS 2-INPUT AND GATE
—TOP VIEW—
1
5 V
2
GND 3 4
TC7SH02FU (TOSHIBA)CHIP PACKAGE
TC7SH02FU-TE85R
C-MOS 2-INPUT NOR GATE
—TOP VIEW—
1 5 V
2
OUT
GND 3 4
D Q
1 1
0 0
x Q
0
x HI-Z
TC7SH04FU (TOSHIBA)CHIP PACKAGE
TC7SH04FU-TE85R
TC7SHU04FU-TE85R (TOSHIBA)CHIP PACKAGE
C-MOS INVERTER
Q8
—TOP VIEW—
1
5 V
2
GND 3 4
11 10 9 8 INPUTS
S R CK D
D D
0 1 x
Q x
Q
S R
D
D
1 0 x x
D
0 x
0 x
1 1 1
0
1 1
1 1 0 x
GND
0 : LOW LEVEL
4 5 6 7
1 : HIGH LEVEL
x : DON'T CARE
10
12 S 9
D
D Q
11
8
Q
R
D
13
2
A
A 4
DD
Y
1 Y =
B
B
Y = A • B = A + B
A B Y
0 0 0
0 1 0
1 0 0
0 : LOW LEVEL
1 1 1
1 : HIGH LEVEL
1
A A
DD 4
Y =
2 Y
B B
A + B A B
Y = = •
A B Y
0 0 1
0 1 0
1 0 0
0 : LOW LEVEL
1 1 0
1 : HIGH LEVEL
2 4
DD A A
Y = Y
A
Y =
A Y
0 1
0 : LOW LEVEL
1 0
1 : HIGH LEVEL
OUTPUTS
Qn+1 Qn+1
1 0
0 1
1 1
1 0
0
1
Qn Qn
HSR-1/1P
HSR-2/2P