Power Controlled Stage; Pre-Driver Stage; Driver Stage - Motorola 6864115B62-C Detailed Service Manual

2-10
From VCO
Controlled
Stage
To Microprocessor
Device Q4401 is surface mounted. Q4421, Q4431 and Q4441 are directly attached to the heat sink.
5.1

Power Controlled Stage

The first stage (U4401) amplifies the RF signal from the VCO (TXINJ) and controls the output power
of the PA. The output power of the transistor U4401 is controlled by a voltage control line feed from
the PCIC pin4(U4501). The control voltage simultaneously varies the bias of two FET stages within
U4401. This biasing point determines the overall gain of U4401 and therefore its output drive level
to Q4421, which in turn controls the output power of the PA.
In receive mode the voltage control line is at ground level and turns off Q4473 which in turn switches
off the biasing voltage to U4401.
5.2

Pre-Driver Stage

The next stage is a 13dB gain LDMOS device (Q4421) which requires a positive gate bias and a
quiescent current flow for proper operation. The voltage of the line PCIC_MOSBIAS_1 is set in
transmit mode by PCIC pin 24 and fed to the gate of Q4421 via the resistive network R4480, R4416
and R4415. The bias voltage is tuned in the factory.
5.3

Driver Stage

The following stage is an enhancement-mode N-Channel MOSFET device (Q4431) providing a gain
of 10dB. This device also requires a positive gate bias and a quiescent current flow for proper
operation. The voltage of the line Bias_2_UHF_PA_1 is set in transmit mode by the ASFIC and fed
to the gate of Q4431 via the resistive network R4632, R4631, R4485 and R4486. This bias voltage
is also tuned in the factory. If the transistor is replaced, the bias voltage must be tuned using the
Pre
PA
Driver
Driver
Bias 2
A S F I C _ C M P
SPI BUS
Bias 1
Vcontrol
Figure 2-1 UHF Transmitter Block Diagram
Power
PA-Final
Sense
Stage
PA
PWR
SET
P C I C
THEORY OF OPERATION
Pin Diode
Antenna
Harmonic
Switch
Filter
Temperature
Sense
To Microprocessor
Antenna
RF Jack