Ignition; Microprocessor Clock Synthesizer; Serial Peripheral Interface (Spi) - Motorola 6864115B62-C Detailed Service Manual

Controller Circuits
1.7

Ignition

Ignition sense is used to prevent the radio from draining the vehicle's battery because the engine is
not running.
When the IGNITION input (J0501 pin 10) goes above 5 volts Q0661 is turned on via line IGNITION
CONTROL. Q0661 turns on INT SW B+ and the voltage regulators by turning on Q0641 and the
microprocessor starts execution. The microprocessor is alerted through line GP6 IN ACC10. The
voltage at the IGNITION input turns Q0181 on, which pulls microprocessor pin 74 to low. If the
software detects a low state it asserts DC POWER ON via ASFIC pin 13 high which keeps Q0661
and Q0641, and in turn the radio switched on.
When the IGNITION input goes below 3 volts, Q0181 switches off and R0181 pulls microprocessor
pin 74 to high. This alerts the software to switch off the radio by setting DC POWER ON to low. The
next time the IGNITION input goes above 5 volts the above process will be repeated.
1.8

Microprocessor Clock Synthesizer

The clock source for the microprocessor system is generated by the ASFIC CMP (U0221). Upon
power-up the synthesizer IC (FRAC-N) generates a 16.8 MHz waveform that is routed from the RF
section to the ASFIC CMP pin 34. For the main board controller the ASFIC CMP uses 16.8 MHz as a
reference input clock signal for its internal synthesizer. The ASFIC CMP, in addition to audio circuitry,
has a programmable synthesizer which can generate a synthesized signal ranging from 1200Hz to
32.769MHz in 1200Hz steps.
When power is first applied, the ASFIC CMP will generate its default 3.6864MHz CMOS square
wave UP CLK (on U0221 pin 28) and this is routed to the microprocessor (U0101 pin 90). After the
microprocessor starts operation, it reprograms the ASFIC CMP clock synthesizer to a higher UP
CLK frequency (usually 7.3728 or 14.7456 MHz) and continues operation.
The ASFIC CMP may be reprogrammed to change the clock synthesizer frequencies at various
times depending on the software features that are executing. In addition, the clock frequency of the
synthesizer is changed in small amounts if there is a possibility of harmonics of this clock source
interfering with the desired radio receive frequency.
The ASFIC CMP synthesizer loop uses C0245, C0246 and R0241 to set the switching time and jitter
of the clock output. If the synthesizer cannot generate the required clock frequency it will switch back
to its default 3.6864MHz output.
Because the ASFIC CMP synthesizer and the µP system will not operate without the 16.8 MHz
reference clock it (and the voltage regulators) should be checked first in debugging the system.
The microprocessor uses XTAL Y0131 and associated components to form a Real Time Clock
(RTC). It may be used to display the time on controlheads with display or as time stamp for incoming
calls or messages. The real time clock is powered from the voltage VSTBY to keep it running while
the radio is switched off. When the radio was disconnected from it's supply voltage, the time must be
set again.
1.9

Serial Peripheral Interface (SPI)

The µP communicates to many of the IC's through its SPI port. This port consists of SPI TRANSMIT
DATA (MOSI) (U0101-100), SPI RECEIVE DATA (MISO) (U0101-99), SPI CLK (U0101-1) and chip
select lines going to the various ICs, connected on the SPI PORT (BUS). This BUS is a synchronous
bus, in that the timing clock signal CLK is sent while SPI data (SPI TRANSMIT DATA or SPI
RECEIVE DATA) is sent. Therefore, whenever there is activity on either SPI TRANSMIT DATA or
SPI RECEIVE DATA there should be a uniform signal on CLK. The SPI TRANSMIT DATA is used to
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