56F8323Evm Architecture; 56F8323Evm Configuration Jumpers; Block Diagram Of The 56F8323Evm - Motorola 56F8323 User Manual

Evaluation module
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1.1 56F8323EVM Architecture

The 56F8323EVM facilitates the evaluation of various features present in the 56F8323
part. The 56F8323EVM can be used to develop real-time software and hardware products
based on the 56F8323. The 56F8323EVM provides the features necessary for a user to
write and debug software, demonstrate the functionality of that software and interface
with the user's application-specific device(s). The 56F8323EVM is flexible enough to
allow a user to fully exploit the 56F8323's features to optimize the performance of his
product, as shown in
Figure
8.00MHz
Crystal
Reset Logic
JTAG
Connector
Parallel
DSub
JTAG
25-Pin
Interface
Figure 1-1. Block Diagram of the 56F8323EVM

1.2 56F8323EVM Configuration Jumpers

Fifteen jumper groups, (JG1-JG15), shown in
features on the 56F8323EVM board.
settings.
1-2
Freescale Semiconductor, Inc.
1-1.
56F8323
XTAL/
SPI #0
EXTAL
SCI #1
RESET
SCI #0
Timer C
Timer A
PWMA
ADCA
QuadDec #0
FlexCAN
JTAG / EOnCE
+3.3V & GND
+3.3VA & AGND
+3.0V
REF
Table 1-1
56F8323EVM User Manual
For More Information On This Product,
Go to: www.freescale.com
Optional
4-Channel
10-Bit D/A
RS-232
Interface
Peripheral
Expansion
Connectors
CAN Interface
Debug LEDs
PWM LEDs
Power Supply
+3.3V, +3.3VA, +5V &
+3.0VA
1-2, are used to configure various
Figure
describes the default jumper group
D/A
Header
DSub
9-Pin
Peripheral
Daughter Card
Connector
CAN Bus
Header
CAN Bus
Daisy Chain
MOTOROLA

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