Panasonic FZ-10 Service Manual page 8

1-5. Block Explanation
CPU
CPU is ARM60. This RISC type micro processor has 32-bit address and 32-bit data path.
MADAM
supplies CPU with 12.5 MHz clock.
ROM
1 MB ROM stores the system management program. The ROM is connected to Slow bus and its data is read by
MADAM and MADAM arranges 8-bit data into 32-bit word and send it to CPU.
SRAM
32 KB SRAM is connected to Slow bus. Since Lithium battery backs up SRAM while power is down,
SRAM can retain data. It may be used to back up game data, for example.
DRAM/VRAM
DRAM and VRAM is used as main memory.
VRAM is dual-port memory. This means one port is used as normal DRAM and the other one is used to read and write
data simultaneously with the former port. Therefore, it is used as Frame Buffer which is required fast access.
ANVIL
This system IC includes MADAM, CLIO (the system IC's for FZ-1) and a digital color encoder. ANVIL has
the following functions.
CPU control: ANVIL drives control signals for the CPU.
Memory management: ANVIL controls access to DRAM's and VRAM's.
Cell engin: ANVIL manages cells (objects on TV screen).
DSP: ANVIL includes a digital signal processor, which deals with sound.
Video signal output: ANVIL outputs video signals (composit, Y and C).
AudloDAC
16-bit Audio DAC converts digital audio data from CLIO into analog audio data.
CLIO sends DAC data with serial communication manner.
CD-ROM interface
CD-ROM interface Gate Array is the interface between CLIO and both internal CD-ROM drive and External drives which
are connected through Expansion Port.
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