Sony MHC-V77DW Service Manual page 101

Pin No. Pin Name
N9 VDD_N9
P1 VSS_P1
P2 A5_P2
P3 A2_P3
P4 NO_USE
P5 NO_USE
P6 NO_USE
P7 A1_P7
P8 A4_P8
P9 VSS_P9
R1 VDD_R1
R2 A7_R2
R3 A9_R3
R4 NO_USE
R5 NO_USE
R6 NO_USE
R7 A11_R7
R8 A6_R8
R9 VDD_R9
T1 VSS_T1
T2 RESET
T3 A13_T3
T4 NO_USE
T5 NO_USE
T6 NO_USE
T7 NC_T7
T8 A8_T8
T9 VSS_T9
I/O
-
Power Supply: 1.5V +/-0.075
-
Ground
Address inputs: Provided the row address for active commands and the column address for
I
Read/Write commands to select one location out of the memory array in the respective bank.
The address inputs also provide the op-code during Mode Register Set commands.
Address inputs: Provided the row address for active commands and the column address for
I
Read/Write commands to select one location out of the memory array in the respective bank.
The address inputs also provide the op-code during Mode Register Set commands.
-
Not used
-
Not used
-
Not used
Address inputs: Provided the row address for active commands and the column address for
I
Read/Write commands to select one location out of the memory array in the respective bank.
The address inputs also provide the op-code during Mode Register Set commands.
Address inputs: Provided the row address for active commands and the column address for
I
Read/Write commands to select one location out of the memory array in the respective bank.
The address inputs also provide the op-code during Mode Register Set commands.
-
Ground
-
Power Supply: 1.5V +/-0.075
Address inputs: Provided the row address for active commands and the column address for
I
Read/Write commands to select one location out of the memory array in the respective bank.
The address inputs also provide the op-code during Mode Register Set commands.
Address inputs: Provided the row address for active commands and the column address for
I
Read/Write commands to select one location out of the memory array in the respective bank.
The address inputs also provide the op-code during Mode Register Set commands.
-
Not used
-
Not used
-
Not used
Address inputs: Provided the row address for active commands and the column address for
I
Read/Write commands to select one location out of the memory array in the respective bank.
The address inputs also provide the op-code during Mode Register Set commands.
Address inputs: Provided the row address for active commands and the column address for
I
Read/Write commands to select one location out of the memory array in the respective bank.
The address inputs also provide the op-code during Mode Register Set commands.
-
Power Supply: 1.5V +/-0.075
-
Ground
Active Low Asynchronous Reset: Reset is active when RESET is LOW, and inactive when
RESET is HIGH. RESET must be HIGH during normal operation. RESET is CMOS rail to rail
I
signal with DC high and low at 80% and 20% of V
for DC low.
Address inputs: Provided the row address for active commands and the column address for
I
Read/Write commands to select one location out of the memory array in the respective bank.
The address inputs also provide the op-code during Mode Register Set commands.
-
Not used
-
Not used
-
Not used
-
No Connect: No internal electrical connection is present.
Address inputs: Provided the row address for active commands and the column address for
I
Read/Write commands to select one location out of the memory array in the respective bank.
The address inputs also provide the op-code during Mode Register Set commands.
- Ground
Description
, example, 1.20V for DC high and 0.30V
DD
MHC-V77DW
101