Sony MHC-V77DW Service Manual page 89

Hide thumbs Also See for MHC-V77DW:
Table of Contents

Advertisement

Pin No.
Pin Name
Y6
LCM_RST
Y7
NO_USE
Y8
NO_USE
Y9
NO_USE
Y10
VCCK_Y10
Y11
GNDK_Y11
Y12
GNDK_Y12
Y13
GNDK_Y13
Y14
VCCK_Y14
Y15
VCCK_Y15
Y16
GNDK_Y16
Y17
VCCK_VPROC_Y17
Y18
VCCK_VPROC_Y18
Y19
VCCK_VPROC_Y19
Y20
VCCK_VPROC_Y20
Y21
GNDK_Y21
Y22
GNDK_Y22
Y23
NO_USE
Y24
DAC_B_OUTPUT
Y25
AVDD18_DAC
Y26
SYSRSTB
Y27
SRCLKENAI
Y28
PWRAP_SPI0_MO
Y29
NO_USE
AA1
I2S0_DATA
AA2
I2S0_DATA_IN
AA3
NO_USE
AA4
AUD_EXT_CK2
AA5
AUD_EXT_CK1
AA6
NO_USE
AA7
NO_USE
AA8
NO_USE
AA9
NO_USE
AA10
NO_USE
AA11
GNDK_AA11
AA12
VCCK_AA12
AA13
GNDK_AA13
AA14
VCCK_AA14
AA15
AVDD18_AP
AA16
NO_USE
AA17
VCCK_VPROC_AA17
AA18
VCCK_VPROC_AA18
AA19
NO_USE
AA20
VCCK_VPROC_AA20
AA21
NO_USE
AA22
GNDK_AA22
AA23
NO_USE
AA24
NO_USE
AA25
NO_USE
AA26
NO_USE
AA27
SRCLKENA
AA28
WATCHDOG
AA29
RTC32K_CK
AB1
I2S0_LRCK
AB2
I2S0_BCK
AB3
I2S0_MCLK
I/O
I/O
LCM reset
-
Not used
-
Not used
-
Not used
-
Digital power input for core
-
Ground pin
-
Ground pin
-
Ground pin
-
Digital power input for core
-
Digital power input for core
-
Ground pin
-
Digital power input for processor
-
Digital power input for processor
-
Digital power input for processor
-
Digital power input for processor
-
Ground pin
-
Ground pin
-
Not used
-
Not used
-
Analog power input 1.8V for General DAC
I
System reset input
I/O
26MHz co-clock enable input
I/O
PMIC SPI control interface
-
Not used
I/O
I2S channel 0 data
I/O
I2S channel 0 input data
-
Not used
I/O
Audio external clock input
I/O
Audio external clock input
-
Not used
-
Not used
-
Not used
-
Not used
-
Not used
-
Ground pin
-
Digital power input for core
-
Ground pin
-
Digital power input for core
-
Analog power input 1.8V for AuxADC and TSENSE
-
Not used
-
Digital power input for processor
-
Digital power input for processor
-
Not used
-
Digital power input for processor
-
Not used
-
Ground pin
-
Not used
-
Not used
-
Not used
-
Not used
I/O
26MHz co-clock enable output
I/O
Watchdog reset output
I/O
32K clock input
I/O
I2S channel 0 word select
I/O
I2S channel 0 clock
I/O
I2S channel O master clock
Description
MHC-V77DW
89

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents