Sony MDS-JA50ES Service Manual page 74

• IC301 Digital Filter (CXD8512Q)/AD board
Pin No. Pin Name
1 TEST
2 NC
3 SYNC
4 INIT
5
NC
6 CFLG
7, 8
VDD
9 LRKI
10 BKI
11
NC
12 DLI
13 DRI
14 IFLG
15, 16 NC
17 FE
18 AL2
19 AR2
20 AL1
21 AR1
22, 23 Vss
24, 25 CVss
26 FCLK
27 MCLK
28 CVDD
29 NC
30 IBIT
31
NC
32 Vss
33 SCALE
34 ISEL1
35 ISEL2
36
NC
37 DITH
38 BOOST
39 VDD
40 MODE
41
SHIFT
42 LATCH
43 NC
44 LC
45 TEST
I/O
I
Test pin (Fixed at "L")
—
Not used
I
Sync mode selection (Fixed at "L")
I Initialization input
—
Not used
O
Flag output for calibration (Not used)
—
Power supply (+5V)
I
LRKI input (8fs/2fs/fs) (Not used)
I BKI input (8fs/2fs/fs) (Not used)
—
Not used
I Lch data input (8fs/2fs/fs) (Not used)
I
Rch data input (8fs/2fs/fs) (Not used)
O
Input side sync flag output (Not used)
— Not used
I
Test pin (Fixed at "L")
I Lch data input (64fs) (Not used)
I
Rch data input (64fs) (Not used)
I
Lch data input (64fs)
I
Rch data input (64fs)
—
Ground
—
O
FE clock output (128fs)
I Master clock input (256fs)
—
Power supply (+5V)
—
Not used
I Data input word length selection (64fs) (Fixed at "L")
—
Not used
— Ground
I
Test pin (Fixed at "L")
I
Input selection (Fixed at "L")
I
Input selection (Fixed at "L")
—
Not used
I
Dither (Not used)
I
Boost (Not used)
—
Power supply (+5V)
I
MODE data input (Not used)
I
SHIFT clock input (Not used)
I
LATCH input (Not used)
—
Not used
I
Low cut (Not used)
I Test pin (Fixed at "L")
— 96 —
Function