Panasonic TY-FB8HM Service Manual page 27

IC3303
A=3.3V, B=5V
/OE2 7
3 SDA 5
6 SCL 2
JK3301
1
D2+
2
D2G
3
D2-
4
D1+
5
D1G
6
D1-
7
D0+
8
D0G
9
D0-
10
CLK+
11
CLKG
12
CLK-
13
CEC
14
N.C.
15
SCL
16
DDC DATA
17
DDCG
5V_PLUG
18
+5V
19
HPDT
HDMI
INPUT
Q3301
Hot plug
detect control
IC3304
RESET
VOUT 4
IC3319
INVERTER
2 A Y 4
MODE SW
SW3301
IC3302
DDC EEPROM
C_WP
WP 7
C_SCL
SCL 6
C_SDA
5
SDA
TY-FB8HM HH-Board Block Diagram
IC3305
HDMI I/F RECEIVER
71
RESET#
72
CLK-
CSDA
75
REGISTERS IIC
76
IIC CSCL
---------
SLAVE
74
SLAVE CONFIGURATION
77
LOGIC BLOCK
AUX DATA
MCLK
LOGIC
HDCP
HDCP
BLOCK MLCK OUT
KEYS DECRYPTION
26
GEN
EEPROM
ENGINE
AUDIO MCLKIN
27
97
DATA
SCK
DECODE 32
XOR MODE
96
SDO
MASK CONTROL LOGIC
30
BLOCK WS
92
PANEL LINK
31
TMDS CONTROL
91
SIGNALS
DIGITAL
87
CORE CONTROL
SIGNALS
86
84
83
37 36
R07
8
39 38
43 42
R00 48 44
VIDEO
50 49
G07
COLOR
8
52 51
SPACE
CONVERTER
54 53
UP/DOWN
G00 58 55
SAMPLING
60 59
B07
8
62 61
68 63
B00 70 69
HSYNC
33
VSYNC
34
ODCK
46
AnRPr
7
AnGY
12
AnBPb
15
IC3306
MICON
D_FA
D_FA 79
D_SCL
D-SCL 78
D_SDA
60 HDMI_INT
D-SDA 80
5 HDMI_RST
16
DV_S_MUTE
B-SCL 18
40 MODE INPUT
19
B-SDA
38
LVDS PD#
70
E-SCL
E-SDA 71
IC3317
INVERTER
IC3308
2 A Y 4
EX. I/O
E_SCL
14
E_SDA
15
6
3
AUDIO MUTE
HQ2
D_FA
2
D_SCL
4
D_SDA
5
AUDIO AMP L
IC3301
B_SDA
B_SCL
AUDIO DAC
6 SMUTE/CSN
1 MCLK
AOUT L
11
BICK
2
SDTI
3 D/A
AUDIO AMP R
LRCK
4 AOUT R
10
PDN
5
8
8
8
K_R
K_G
K_B
5V_PLUG
Q3302
Hi : MUTE
Audio Mute when cable is not connected
CABLE IN -> Hi : Norm
CABLE OUT -> Low : Mute
AUDIO MUTE CIRCUIT
Q3304,Q3305
Q3306,Q3307
Q3310
DV_S_MUTE
IC3318
B_SCL
B_SDA
VIDEO AMP
Q3316
Q3313
2
K_R -
Q3317
7 -
Q3314
K_G
5 -
Q3318
Q3315
K_B
SCL
SW0 2
SDA
SW1
1
SW2 9
DAC1
SW3 10
DAC4
FOR
MICON
LOADER
D-FA
D-SCL
D-SDA
IC3309
9V
+ Q3311
1
2
-
9V
Q3308
+
7
6
-
Q3312
IC3313
Q3309
IC3310
+
1
2 -
LVDS TRANSMITTER
+
7
6
-
DATA(LVDS)
3 56
R07 TX0+
47
8
55 54
TX0-
48
52 51
TX1+
45
2 50 R00
TX1-
46
14 12
G07
TX2+
41
8
11 7
TX2-
6 4 42
TX3+
10 8 G00
37
TX3-
24 23 B07 38
8
22 20
19 15
18 16 B00
CLOCK
27
HS
(LVDS)
TXC+
28 VS
39
31 PLL
TXC-
CLK IN 40
PWRDWN 32
IC3311
+
J_R
15
CONFIG ROM
for HP mode
+
J_B H_SDA H_SDA
10 SDA 5
H_SCL H_SCL
SCL 6
+
J_G
12 WP 7
IC3312
EX. I/O
H_SDA
4 P0 SCL 14
5 P1
H_SCL
6 P2 SDA 15
H_SCL
H_SDA
C_SCL
C_SDA
C_WP
TO
HQ1
J-BOARD
AUD_L
A26 L
AUD_R
A28
R
B39 /0E2
TX0+
B3
B2 TX0-
B6 TX1+
TX1-
B5
TX2+
B9
B8 TX2-
B15 TX3+
TX3-
B14
TXC+
B12
TXC-
B11
J_G
J_G
A38
J_B
J_B
A36
J_R
J_R
A34
G_SCL
B25
G-SCL
G_SDA
B24 G-SDA
G_SRQ
G-SRQ
B23
5V_STB A22 5V_STB
9V A21 9V
B21 9V
A19 5V
5V
B19 5V
3.3V A17 3.3V
3.3V
B17
G_SRQ
IC3315
A=PANEL, B=BOARD
1 /OE1
G_SDA
3 SDA 5
G_SCL
6 SCL 2
IC3316
A=PANEL, B=BOARD
/OE1
1
3 SDA 5
6 SCL 2
IC3314
FOR
CONFIG ROM
CONFING ROM,
for HP mode
DDC EEPROM
SDA 5
HQ3
7 WP SCL 6
9 DSDA
8
SCL
2 G-SRQ
10 WP
6 H_SCL
7 H_SDA
4 C-SCL
5 C-SDA
1
C_WP
TY-FB8HM HH-Board Block Diagram